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AN10868 greenchip tea1733 series fixe d frequency flyback controller rev. 3.1 ? 22 may 2013 application note document information info content key w ords gree nchi p , t e a1 733, smps, fl yback , ad apter, n o tebo ok, lcd mon ito r . abstract the tea1733 is a low cost member of the greenchip family. it is a fixed-frequency flyback controller intended for power supplies up to 75 w for applications such as notebooks, printers and lcd monitors. http://
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 2 of 46 cont act information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller rev i si on hi st ory rev date des c ription v . 3.1 201 305 22 upd ated issue modifications: ? section 3.2.5 ? vcc capacitor ? has bee n upd ate d . ? section 3.4.11 ? undervoltage lockout (uvlo) ? has been updated. v . 3 201 01 12 4 t hird issue v . 2 201 006 01 secon d i ssue v . 1 200 912 09 fi rst issu e
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 3 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 1. introduction th e tea17 33 is a fixed fr equ en cy flyba c k c ontr o ller th at ca n be use d fo r discon t i nuo us con duction m ode ( d cm ) as we ll a s con t in uo us con d u c tion m ode ( c cm ). 1.1 s cop e th is a pplicatio n note de scr i be s the fun c tion a lity o f the tea1 733 ser i es. fixe d- fr eq uen cy flyback fu nda men t als a n d calcul ation of tran sf o rme r an d othe r lar g e sign al p a rt s ar e no t d ealt with in this ap plication n o te. t he tea17 3 3 d e mo boa rd is de scr i bed in a se p a ra te us er m a nu al (um 1 03 8 5 ) . 1.2 f eatures ? smps c o ntroller ic enabling low cost applic ations ? l a rg e inp u t vo lt age r a n ge ( 1 2 v to 3 0 v , 3 5 v pea k allo wed for 1 00 ms) ? v e r y lo w su pp ly c u r r e n t d u r i ng s t ar t a n d re st ar t (ty p ic ally 10 ? a) ? l o w sup p ly cu rr ent du rin g nor ma l o per ation ( t yp ica lly 5 0 0 ? a, no lo ad ) ? ove r p o wer com pen sa ti on (h igh / lo w lin e co mpe n sation ) ? ad just a b l e ov er po we r tim e - o u t ? ad just a b l e ov er po we r re st a r t tim e r ? fix e d fr eq uen cy wi th f re q u enc y j i tt er to r e d u c e emi ? fr eq uen cy re du ction with fixe d minim u m pe ak cu rr ent at low p o wer ope ra tio n to ma int a in high e f ficien cy at low output power lev e ls ? slop e comp ensatio n fo r ccm o per ation ? l o w a nd a d just ab le over cur r en t protection (ocp ) trip level ? sof t st art ? t w o inde pe nde nt ge ner al p u r pos e pr otectio n in put s comb ine d on a sing le p i n ( e .g. for ove r t e mp er atur e pro t e c tion (ot p ) an d outpu t ove r v o lt age pr otection ( o vp) ) ? internal otp 1.3 a pplications th e tea1 733 is i n tend ed fo r a pplicatio ns th at re qui re a n e f ficien t a nd co st-e f f e c tive po wer supply solution up t o 75 w such as: ? noteb ooks ? lc d m o nit o r s ? printers
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 4 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 1.4 t ea1733 series type overview [1] t he only dif f e r ence be tween the latch version and the rest ar t ve rsion is how the over power prot ection is han dled (in t he n2 versions this is also how uvlo is handled). pr otection triggered by the protec t pin ( output ov er volt age protection, overtempe r atur e prot ectio n) or by the interna l overte mperatur e prot ection always r esult s in lat c hed o f f- st a te. protection trigger ed by the vinsense pin (bro wn out, input overvolt age pr otect i on) alw ays trigger s a rest art. 1.5 latched versions tea1733l t , tea1733mt , tea1733l t/n2 and tea1733mt/n2 all tea17 33 ver s io ns a r e a v ailab l e in a r e st ar t ver s io n and a latch ve rsion . th e only d i f f er en ce b e tween the two ver s io ns is ho w the ove r po we r pro t e c tio n (opp) is ha ndle d : ? tea1733t , tea1733p , tea1733a t , tea1733b t : opp ev ent initiates saf e rest art ? tea1 733 l t , tea1 73 3mt : opp e v e n t set s ic in la tche d of f- st ate ? t ea1 733 l t /n2, tea17 33m t/n2 : opp or uvlo e v ent se t s ic in la tch ed of f-st ate 1.6 h igher switch ing freq uency versi ons tea1733a t , tea1733mt(/n2) and tea1733bt incre a sing the switch ing fre q u ency has an imp o r t ant ad va nt ag e: ? mo re o u tpu t po we r po ssib le wi th same induc t or c o re size but it a l so h a s disadvan t a g e s: ? higher switching losses ? th e switching fr equ en cy 2n d har mon i c e x cee d s th e 15 0 khz b o u nda ry and m u st comp ly to th e emi st and ar ds for co ndu cted e m issio n . t h is can b e a p r o b lem if th ere is no m a rg in lef t in th e low fr eq u e n cy ar ea . note that in ccm, the power tr an sfe r r e d f r o m in pu t t o ou tp ut d o e s no t in cr ea se lin ea r l y with th e switching fr equ en cy . if th e go al is to co nver t as much e ner gy as p o ssible with th e small e st po ssib le co re size, ccm shou ld be a v o i de d. 1.7 a pplication schematic fig u r e 1 shows a typical tea1733 application schematic. t a ble 1. t e a173 3 series typ e ov erv i ew t h is t a ble on ly sh ows the d i ffe r e n ces betwee n th e va ri ous tea1 733 versio ns, al l o t h e r p r ope rtie s are id entical . property t lt lt/n2 p at mt mt/n2 bt pack age s o8 dip8 so8 sw itch ing freque ncy (khz) 6 6 . 5 91.5 1 23 overpower protection [1] rest art l a t ch re st art r est a rt la tch r est a rt ma xi mu m on -ti m e p r o t e c tio n no action re st art no action no a c ti on rest art n o acti on u v lo protection re st art l atch re st art r est a rt la tch r est a rt f r equ ency jitter ra nge (khz) r 4 r 5 r 7 sl ope compe n sation (mv/ p s) 25 33 44
x xxx xxx xxxx xxx xxxx xxx xx xxxx xxx xxxx xxx xxxx xxx xxx xxx xxx x x x x x xxxx xxx xxxx xxx xxxx xxx xxxx xxx x x xxxx xxx xxx xxxx xxx x xx xx xx xxx x xxx xxx xxxx xxx xxxx xxx xxxx xx xxx xxxx xxx xxxx xxx xx x xxx xx xxxx xxx xxxx xxx xxxx xxx xxx xxxx xxx xxxx xx xxxx xxx xxx x x x xxx xxx xxxx xxx xxxx xxx xxx xxx xxx xxxx xxx xxxx xxx xxxx xxx xx xxx xxx xxxx xxx xxxx xxx xxx xxxx xxx xxxx xxx xxxx xxx xxx xxxx xx xxxx xxx x x xxx xxx xxxx xxx xxxx xxx xxxx xx xxx xxxx xxx xxxx xxx x xx x AN10868 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. application note rev. 3.1 ? 22 may 2013 5 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller f i g 1 . t y pica l tea1 733 a p p l icatio n sch ema t ic 019aaa154 f1 cx1 330 nf 275 v c11 4.7 f 50 v c4 100 pf 1 kv rm10 l p = 600 h c6 470 nf c7a option c17 option c19 option r13 r26 c18 c15 option option cy1 bc1 (ferrite bead) 2.2 nf 400 v option r18 d3 bas21w 6.8 h 1 k r22 10 k r15 4.7 r14 d2 1n4148w d9 mbr20100 d10 10 r12 q1 2sk3569 c5 220 nf c16 10 nf 33 k c2 4.7 nf 500 v c3 2.2 nf 630 v 6 7 2 3 1 44 turns 4 5 8 turns 8 turns c1 120 f 400 v c13 680 f 25 v c14 680 f 25 v r2 1.5 m r16 2.2 m r4 3.3 m r5 3.3 m r9 43 k r10 43 k r6 3.3 m r7 82 k d1 sa2m r23 35.7 k 1 % r25 option r24 5.1 k 1 % rt1 ntc 470 k at 25 c 11.2 k at 110 c r17 5.1 k 1 % zd1 bzx84j-b24 r1 1.5 m lf2 3.15 a 250 v l n 5 vinsense c10 100 nf 6 pr o tect c9 10 nf 7 ctrl r11 0.15 r20 330 r21 option c8 220 nf c7 100 nf 50 v u2-1 lvt-356t u2-2 lvt-356t u3 ap431sr 8 4 3 2 1 optimer isense driver gnd vcc tea1733 u1 lf1 bd1 kbp206g bd1b bd1a bd1d bd1c gnd + 19.5 v 3.34 a
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 6 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 2. pin description t able 2. pin de scr ip tio n pin number pin name d esc rip t io n 1v c c sup p ly vo lt age at ma ins switch-on, th e ca p a ci tor conn ecte d to this pi n i s cha r ged by an externa l st art-up circ uit. w hen the vol t a ge on the pin e x ce eds v st ar tup the ic wakes up from po wer-down mod e and checks if all other conditions are met to st art switching. w hen the vol t a ge on the pin d r o p s belo w v th (u v l o) th e tea173 3 sto p s swi t chi ng and e n ters po wer-dow n mo de. (w hen the vol t ag e rises a bove v st ar tu p a normal st art-u p procedu re is ca rri ed out.) d u ring a safe rest art pro c e dure, th is p i n is interna lly clamped to a volt age j u st ab ove v st ar tup . d u ring l a tch ed protection this pi n i s i n te rnall y cla m p ed to a vo lt a ge ju st abo ve v rs t (l a t c h ) to e nab le fa st latch reset af ter unp lug g ing the mai n s. ? v st ar t u p =2 0 . 6v ( t y p . ) ? v th (u v l o) = 12.2 v (typ.) ? v c l am p( v cc) du ri ng rest art = v st ar tu p +1v ? v c l am p( v cc) du ri ng la tche d protecti on = v rs t(la tch ) +1v ? v r s t( latc h) =5v absolute maximum rating: v cc = 3 0 v (35 v for 100 ms). 2 g nd groun d 3 driver gate driver ou tpu t f o r mo sfet ? i so ur ce (dri v e r ) = 0 .3 a (typ.) at v driver =2v ? i sink( d river) = 0 . 3 a (t yp.) at v dri ver =2 v ? i sink( d river) = 0 .7 5 a (t yp .) at v dr i v e r =1 0v freq ue n c y mo du la tio n ? mo dula t i on rang e = ? 4k h z ( ? 5 khz i n 9 1 .5 khz swi t chi ng fre que ncy versio ns and ? 7 k hz in the 12 3 kh z versio n) ? mo dula t i on fre quen cy = 2 80 hz
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 7 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 4 i sense c u rr en t se nse in pu t general t h i s pin sen s es the primary cu rre n t across an exte r nal resistor a nd co mp ares it to an in te rnal co ntro l vo lt a ge. t h is internal con t rol volt age , v c t rl ( i pe ak ) is pro portion al to th e ct rl pin volt age : v c t rl( i pe ak ) =( v ctr l ? 1.1) / 5 .6. o ve r po we r pro t ecti o n w hen the vol t a ge on the isense pin e x ce eds t he overpo wer protection li mi t, the o v erpowe r timer is st ar ted: v th (se n se )o pp = 400 mv . ove r cu rre nt pro t ection t h e i n ternal con t rol vo lt a ge v c t rl ( i pe ak ) i s li mi te d to 5 00 mv wh ich also l imit s the volt ag e on th e isense input: v s e ns e (ma x ) =5 0 0 m v . le ad in g ed ge b l a nk i n g the first 300 ns o f each switching cycle, the is en s e inp u t is i n ternal ly bl anked to p r e v ent the sp ike caused b y p a rasitic ca p a cit ance trigg e ring the pe ak cu rre n t comp a r ator p r e m atu r ely . pr op aga t io n de la y goi ng fro m de te ctin g the l e vel to switch ing o f f t h e driver t a k e s time. during that t i me the p r imary cu rre n t con t i nues to increase . how much it is a b le to increa se d epe nds on the di/d t sl ope an d th us o n th e ma ins volt age. so th e re sulting pe ak current n o t o n ly dep ends on the c t rl vol t a ge but also on the main s vol t ag e. ove rpo we r com p en sa tio n (high / lo w lin e com p en sa tio n ) w ithou t coun te r mea s u r es, the maximum output powe r (in cc m) wou ld be hi gher for h igh i npu t vo lt ages. t o compensa t e this e f fect the in p u t volt age measure d on the vinsense p i n i s i n ternal ly co nverted to a smal l cu rre n t o n th e isense i npu t. thi s curren t cause s a vol t ag e d r op over the series resistor , limi t in g th e ma xi mu m pe ak current for hig h inpu t volt ag e. by tun ing the se ries resistor , the maxi mu m o u tp ut powe r can be made th e same fo r h igh a nd lo w mains. so f t st ar t just before the converter starts, the soft start capacitor (c5 in figure 1 ) is charged by an internal current source (55 ? a). after the capacitor has been sufficiently charged, the current source is switched off and the controller starts switching. the soft start capacitor now slowly discharges through the soft start resistor (r12 in figure 1 ), sl owly ena bli ng th e primary peak curr ent to grow . slo p e co mp ens a tio n amou nt o f slop e co mpensa t io n (re lated to isense pin ) : ? 66.5 khz versio ns: 2 5 mv/ ? s ? 91.5 khz versio ns: 3 3 mv/ ? s ? 123 khz versions: 44 mv/ ? s the slope compensation is only acti ve at duty cycles higher than 45 %. remark: r13 should be placed close to the ic. its pu rpose is to prevent negative spikes from reaching the pin (these can be rectified by t he internal esd protection diode which causes a dc offset across c5). t able 2. pin de scr ip tio n ? c ontinued pin number pin name description
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 8 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 5 v insense in pu t v o lt a g e se ns e p i n t h i s pi n mo nitors the mai n s inpu t volt ag e. it can de te ct th ree leve ls. t he volt age o n the vinsense pin should exceed v st ar t ( vinsen se) t o be able to st art (or res t art) the convert e r . d u ring o peratio n the vol t a ge must remai n b e tween v d et (l) (v i n s e n s e ) (fo r bro w nou t protection ) a nd v de t ( h)( vinsense) (inp ut ovp to protect th e mosfet), oth e rwise the device will ca rry o u t a sa fe rest art p r o c edu re . t h i s pi n is i n tende d to b e co nnected to th e recti f i ed mains volt age vi a a re si sto r di vider , a ca p a citor to g r ound i s req u ired to fi lter o u t the rip p le on the rectified main s vol t a ge. ? v de t ( h)( vin se n se) = 3 .52 v ( i nput o vp) ? v s t ar t(vinsense) =0 . 9 4 v ? v de t ( l) ( v i n sense) = 0 .72 v (brown out p r otecti on) see section 3 .3 fo r ho w to transla te these l e vels to mai n s vo lt ages. ove rpo we r com p en sa tio n t he voltage on the vinsense pin is also used internally for the overpower compensation, see section 3.5 . ope n pi n de te cti on an internal 20 na current source is added for open pin detection. if the vinsense pin is open, the voltage rises above v det(h)(vinsense) and the device will carry out a safe restart procedure. t able 2. pin de scr ip tio n ? c ontinued pin number pin name description
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 9 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 6p r o t e c t ge ne ral pu rpo s e p r ote c t io n i n p u t t wo ind epe nden t protection fea t u r e s can b e co nne ct ed to this pin . an in terna l cu rre n t sou r ce a t tempt s to kee p thi s p i n at 0 . 65 v . th is cu rre n t sou r ce ca n si nk 107 ? a and so urce 32 ? a. if mo re cu rre n t is requ ired to keep the volt age a t 0.65 v th e vo lt age wil l ri se above 0 . 8 v or fal l b e lo w 0 . 5 v and the t ea1733 wi ll enter la tche d protecti on mode . 7c t r l pe ak cu rre nt con t ro l inp u t t h e ct rl pi n vo lt a ge is converted to an intern al control volt ag e v c t rl( i pe ak ) . if the vol t ag e me asured on the isense p i n exceed s this in tern al control volt ag e the d r iver i s swi t che d of f. ? v ct r l fo r mini mu m flyback pea k current = 1.8 v (typ.) ( v c t rl( i pe ak ) = 125 mv) ? v ct r l fo r maximum fl yback peak current = 3.9 v (typ.) (v ctr l (i pe ak) =5 0 0 m v ) ? r int(ctrl ) =7k ? (i nte r nall y con nected to 5.4 v ) r e latio n betwee n the ct rl pi n vo lt age an d the i n ternal con t ro l vo lt a ge (v ctrl to v c t rl( i pe ak ) ): ? v c t rl( i pe ak ) =( v ctrl ? 1.1) / 5 .6 (typi c a l at 25 ? c) r e latio n betwee n the ct rl pi n cu rrent a nd the ctr l pin volt ag e (i o( ctrl) to v ctrl ): ? v ct r l =5 . 4 v ? 7*1 0 3 *i o ( ctrl ) (typi c a l at 25 ? c) 8 o ptimer ove r powe r time r and rest ar t timer both timer functions can be more or less independently adjusted. see section 3.7 for the ca lcula t i on. t h e ratio of th ese ti me s d e termi nes th e ma ximum i npu t pow er d u ring a co ntinuo us overloa d (e.g . sho r ted o u tp ut). ove rpowe r time r if the int e rnal co nt ro l vo lt ag e , v c t rl( i pe ak ) exceed s the overp o wer threshol d of 4 0 0 m v , the o v erpow er timer is activated. an i n te rnal 10 .7 ? a current source char ges the exter n al optimer ca p a citor . if the overp o wer cond iti on last s l ong en ough to charg e the optimer p i n to 2.5 v , th e con t ro ller ca rries o u t a sa fe re st art proced ure (o r enter s l a tched protection mode i n th e latched versio n). if the intern al control volt age d r op s belo w 4 0 0 m v b e fore th e optimer pin rea c h e s 2.5 v , th e opt i mer ca p a ci to r is immedi ate ly discharg ed. t h e minimum r e comm ended v a lue for th e opt i mer resistor i s 47 0 k ? (othe r w i se th ere is a ch ance tha t 1 0 .7 ? a is no t suf f icie nt to ch arge the cap a ci to r to 2 . 5 v ). th e overp o wer function ca n be disa bled b y cho o sing a resi stor low e r tha n 180 k ? . r est art timer when a safe restart procedure is triggered by one of the protecti on features (via the vinsense pin or the optimer pin), the optime r capacitor will be quickly charged to 4.5 v by an internal 107 ? a current source. the tea1733 enters power-down mode and does not start again until the external resistor on the optimer pin has discharged the capacitor to less than 1.2 v. t able 2. pin de scr ip tio n ? c ontinued pin number pin name description
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 10 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3. functional description 3.1 g eneral th e tea17 33 ha s b een d e sign ed for fixed - fre que ncy ccm flyb ack po we r sup p lies. t h e te a17 3 3 u s es pe ak cur r e n t co nt ro l. t h e ou tp ut volt a g e is m e asu r ed an d t r a n s fer re d b a ck via an o p tocou p ler to the ctrl p i n of th e tea173 3. 3.2 s t a rt-up 3.2 .1 c harging the vcc cap ac itor a ca p a cito r on the vcc pin ( c 1 1 ) is char ge d by a re sistor to pr ovide th e st a r t- up po we r . as long as v cc is below v st a r t up (2 0.6 v typ.) , the ic cur r e n t co nsump t io n is lo w ( only 10 ? a). when th e cap a citor is ch ar ged ab ove v st a r t up ( 20.6 v typ.) a nd all othe r co ndition s h a ve bee n me t, th e co ntro ller st a r t s to switch. on ce th e su pply ha s st ar te d, th e tea173 3 is s u pplied by the aux iliary w inding. for fast lat c h reset, the re sisto r must be conn ected be fore th e br idge r e ctifie r . 1 a lo w- co st a n d ef ficie n t im ple m en t a tion f o r th e st a r t - u p circ uit is t o co mb in e it wit h th e x- ca p (cx1) d i sch a r ge r e sistor . se e figu re 3 a (start-up circuit with two resistors). 1. the only way to reset the latched protection is to bring the vcc pin below 5 v. during latched protection, the supply current is only 10 ? a. so if the start-up resistor is connected after the bridge rectifier, the bulk capacitor would continue to feed it for a long time after unplugging the mains. fi g 2. vcc pi n 019aaa155 c11 4.7 f 50 v 6.8 h r18 vcc 5 v latchreset 12.2 v vccstop vcc 20.6 v vccstart switched on during restart switched on during latched protection 1 gnd 2 d3 aux winding bas21w from mains (before bridge rectifier) c7 100 nf 21.6 v 6 v
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 11 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller fig u r e 3 b, shows the circuit shown in figure 3 a b u t dr awn to sh ow mor e clear ly h o w th e vcc cap a citor is char ge d. once the bu lk ca p a citor c1 is fu lly cha r g ed, diod e c a nd d i ode d stop con d u c ting . dur i ng the p o sitive h a lf m a ins cycle di ode a co ndu ct s an d th e cu rr en t th ro ug h r1 ch a r g e s th e vcc ca p a c i to r (c1 1 + c 7) . dur i ng this positive half cycle, p a r t o f the cha r ge cu rr ent lea k s away into r2 . th e wor s t ca se cu rr ent th at leaks i n to r2 oc curs is w h en the vcc ca p a citor is alm o st cha r g ed: (1 ) th e valu e o f r1 an d r2 must be low e nou gh to en sure the re quir e d discha r ge time of the x- ca p (rc < 1 s ) an d also low eno ug h to o b t a in an accep t able st a r t-u p time at low m a ins volt a ge. but it must also be cho s e n to be as hig h as p o ssible to keep the no- loa d powe r co ns um p tio n as low a s p o s s ib le. some examples of start-up times for different resistors are shown in ta b l e 3 . [1] p ower consumption of the combined x- cap d i sch arge and st ar t-up circuit at 230 v ( ac) . a. s t a r t-up circu it with two resi stors b . s imp lified rep r esent ation fi g 3. s t a r t-u p ci rcu it wit h tw o re s is t o r s 019aaa156 cx1 c11 + c7 c1 vcc r2 r1 l n bd1b bd1a bd1d bd1c 019aaa157 c11 + c7 r1 r2 bd1b bd1a c1 bd1d bd1c vcc n l t a ble 3. s t art-u p tim es for d i ffer e nt st ar t-u p re sistor va lu es vcc capacitance: 4.7 ? f + 100 nf = 4.8 ? f. resistor r1 = r2 s t art- up time at 90 v (ac) s t ar t-u p time at 115 v (ac) power at 230 v (ac) [1] 68 0 k ? 1.6 s 1.1 s 70 mw 82 0 k ? 2.0 s 1.4 s 59 mw 1m ? 2.5 s 1.75 s 4 8 m w 1.2 m ? 3.1 s 2.1 s 40 mw 1.5 m ? 4.15 s 2 .75 s 33 mw i le a k v st artup r2 ------ ---- ---- --- - 20.6 v 1.2 m ? -- ---- --- ---- ---- - - 17 ? a == =
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 12 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller fig u r e 5 shows the power co nsume d by th e comb ined st ar t-u p and x- cap discha r g e circui t as a fu nction of the st ar t- up ti me . th e gr aph sho w s ho w to save po we r: ? mo re tha n 10 m w no -lo ad p o wer can b e saved by incr easing th e st a r t-u p time (at 1 15 v ( ac )) from 2 s to 3 s . ? app r o x im ately 17 mw no- loa d po we r can be sa ve d by sp ecifyin g th e st a r t- up time at 115 v (ac) instead of 90 v (ac). fig 4. s t art-u p re sis t or va lu e as a fun c tion o f s t a rt-up time (vcc cap acit a nc e 4.8 ? f) fi g 5. pow er co ns ump t io n of st art-up c i r cui t a t 230 v (ac) as a function of st art- up time (vcc cap acit a nc e 4 . 8 ? f) start-up time (s) 1 4 3 2 019aaa158 90 v (ac) 115 v (ac) 1.2 0.8 1.6 2.0 1.0 1.4 1.8 star t-up resistors (m ) 0.6 start-up time (s) 1 4 3 2 019aaa159 90 v (ac) 115 v (ac) 60 40 80 100 po w er at 230 v (a c) (mw) 20
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 13 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3.2 .2 m easuring s t art-up tim e cap a cit a n c e acro ss th e br idg e diod es ch ang es th e wa ve sh ape of the vo lt age b e for e the bridge rectifier w ith r e spect to the p r im ary gr ou nd. th is ca n significan t ly decr ease the st art-up time. con necting the ground c lip of an osc illo sc ope to the primary ground of the flyback co nver te r can ad d a few n f acro ss th e br idg e diod es (d epe ndin g on the cap a cit a n c e of the main s supp ly to gr ou nd) . t o me asur e th e co rr ect wor s t case st ar t- up time , ma ke sur e the b oar d ha s no ca p a citive co up lin g to pr im ar y g r o u n d : ? use a cu rr en t pr ob e in the ma ins in pu t cable to d e tect ma ins switch -o n. ? th e sa me cur r e n t p r o be in the ma ins in pu t cable can a l so be used to d e tect when th e su pp ly st ar t s switc h in g . t h e t i m e , fr om t h e m o men t the sup p ly st ar t s to switch until it r each e s 9 0 % of th e ou tp ut vo lt ag e, is on ly a fe w ms an d can b e ign o r ed with re spect to the tot a l st ar t-up time . ( i f it is re ally r e q u ir ed to mea s ure th e outpu t volt a g e with an os cilloscope, the y - cap must be removed so that there is no c a p a citive coupling to p r ima r y gr oun d.) ? use a r e sisto r loa d instea d of an e l ectron ic lo ad . rem o ve y - ca p if electro n ic load must b e used. also impo rt a n t wh en me asur ing the st ar t-u p tim e : ? ma ke sure the vcc cap a citor is en tir e ly dischar ge d be fo re st ar ting a me asur eme n t. ? do n o t co nn e ct a pr ob e or m u ltim et er to th e vcc , e ve n a 10 m ? impedance will in flu ence the m easur em ent. 3.2 .3 s t a rt-up circuit with diod es as e x plain ed in section 3 .2.1 , the start-up circuit with two resistors also has a disadvantage. some current does not flow into the vcc capacitor but is lost in one of the resistors. this can be prevented by placing diodes in series with the resistors as shown in figure 6 a an d figure 6 b. figure 6 a r equires two resistors and two low voltage diodes. figure 6 b s a ves one resist or b u t r e q u ir es two hig h vo lt ag e diod es. at 9 0 v ( a c), add ing the d i ode s r edu ces the st a r t-u p ti me by app ro xim a tely 2 0 % witho u t in cr ea sin g th e no-load power consumption. (approximately 10 % at 115 v.)
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 14 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller th e d i od es do n o t blo c k th e x- ca p d i sch a r ge p a th ! the d i scha rg e o f th e x- cap t a kes p l ace via r1 or r2 thr o u gh the ser i es diod e to vcc. fr om vcc the r e a r e seve ral p a ths to g r ou nd ( e ven whe n the ic is in power - do wn mod e a cl amp o n th e vcc pin is active ). fr om g r ou nd it ca n find it s r e tur n p a th to th e x-cap thr o u g h o ne of th e br idg e diod es. 3.2 .4 s t art-up circuit with cha rge pump if the n o - l oad power req u ir eme n t s canno t b e combin ed with th e st ar t- up time r equ ire m en t s , the r e is a m o r e e f ficien t wa y to decr ease th e st a r t-u p time using the ch ar ge pump circuit illustrated in fig u re 7 a. du rin g th e po sitiv e ha lf o f ea ch m a i n s cyc le, current f low s f r om l via c pu mp a nd d c har ge to th e vcc ca p a c i to r . th is pr oc es s st op s wh e n c pu mp is fu lly ch ar ge d. du rin g th e ne ga tiv e ha lf m a ins cy cle, c pu mp is d i sch a r ged : fr om c pu mp via c1 to ground. fr om g r ou nd via d di sc ha rg e back to c pu mp . unlike in the resistor start-up circuit, no sign ificant power is lost in the circuit itself. a. di odes at low side b. di ode s at hig h si de (th is re quire s hi gh volt age d i ode s b u t it saves one resistor) fi g 6. s t a r t-u p ci rcu it s us in g d io de s in s e r i e s 019aaa160 cx1 c11 + c7 c1 vcc r2 r1 l n 019aaa161 cx1 c11 + c7 c1 vcc r1 l n a. basi c cha r g e pump st a r t-up circui t b . p ractical cha r ge pump st art-u p ci rcu it wi th in rush curre nt li mi te r an d x-ca p discharg e fi g 7. s t a r t-u p ci rcu it wit h c h arge pump 019aaa162 cx1 c11 + c7 c1 vcc c pump 10 nf d charge d discharge l n 019aaa163 cx1 c11 + c7 c1 vcc r2 3 m r inr ush 20 k c pump 10 nf r1 3 m l n
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 15 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller th e ch ar ge pum p cir c u i t do es no t pr ovide a disc har ge p a th fo r th e x- cap. an ef ficient way to pr ovide the x- cap discha r g e p a th is to use the r e sistor st a r t-u p circuit beca u se it no t only discharges the x-cap but also helps to charge the vcc capacitor, see figure 7 b. ? th e value o f r1 an d r2 sh ould b e chose n as h i gh a s po ssib le but low eno ug h to comp ly with th e x-cap d i sch a r ge r equ ire m en t: r ? c< 1s : ? fo r a 33 0 n f x-ca p : r < 3 m ? ? f o r a 2 2 0 n f x- cap: r < 4.5 m ? ? t he v alu e of c pu mp mu st be chose n just hig h eno ug h to r e a c h the st ar t-u p tim e t a rg et ( s t a rt with 10 n f a n d incr ease or decr ease for cor r e c t st a r t-u p va lue) . it mu st be a hig h volt age cap a citor . ? th e pu rpo s e of the resistor r in ru sh is to limit the inrush cu rr en t when th e su ppl y is p l ugg ed in at th e top o f the sin e wave. t o mini mize losses th e value sh ou ld be as low a s po ssibl e but hig h eno ugh to com p ly with the pu lsed po wer r a ting o f the r e sistor to surv ive the inrus h current. ? for the diodes , any low v o lt age type w ill do (break down volt age > 30 v). ? if the a v e r a ge st ar t-up cu rr ent at maximum in pu t volt ag e exceed s the m a ximum cu rr en t of th e cla m p o n th e vcc pin , d di sc ha rg e sh ould be r epla c e d by a 24 v zen e r d i ode . remark: th is can occur in the la tche d of f- st ate wh en the po we r consum ption is ver y low . in that ca se th e ch ar ge p u mp n o t o n ly ch ar ges t h e vcc cap a citor but als o very slow ly cha r g e s the h i gh volt ag e b u lk cap a citor (c1) o n the othe r side of the br idg e r e ctifie r . it ha s to be che c ke d th at in latch e d p r o t e c tion mod e th e char ge p u mp d oes no t cha r ge th e high volt a ge bu lk cap a citor a b o v e it s ra te d volt ag e (che ck at maximu m inpu t volt a ge) . t her e a r e two wa ys to so lve th e pr oble m : ? incre a se the lo ad on the rectified ma ins vo lt age . (e .g. l o wer imp e d ance o f volt ag e div i de r on t h e vi nsense pin . ) ev en if so me load has to b e ad ded to the r e ctifie d m a in s v o lt a g e t o pr ev en t th e c h a r g e p u m p d a m a gin g th e hig h vo lt ag e bu lk cap a c i to r , th e ch ar ge p u m p r e m a ins a m o r e ef ficie n t so lut i on t h a n th e re sist or cir c u i t. ? ano t h e r solu tio n is to ad d a n iden tical char ge pump but co nne ct it s inpu t to n in stea d of l ( s ee figu re 8 ). in this case the value of c pump can be divided by two. c aution the rated maximum voltage of the high-voltage bulk capacitor can be exceeded if it is overcharged by the charge pump.
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 16 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3. 2. 4. 1 c h a rg e p u m p in c o mbi n at io n wi th pf c if a pfc (po w e r factor corr ecto r) is used , the vol t age o n the bu lk cap a citor can b e ( m uch) high er tha n the r e ctified main s volt ag e. un der these circumst a n ces, the st ar t-u p cur r e n t p r o v id ed b y the cha r g e pum p ca n be r e d u ced o r even e n tire ly stopp ed. if a rest art oc curs during this co nditio n , the st a r t-u p tim e can be ver y lo ng . th is can be solved b y u s in g a symm etrical cha r g e pum p. 3.2 .5 v cc cap a c itor the vc c cap a cit o r should be as small as poss ib le to m a ke the st ar t- up time a s sho r t as po ss ible ( a n d als o th e la tc h re se t t i me ). fir s t of all the valu e of the ca p a citor sh ou ld be suf f icie nt to sup p ly th e tea173 3 un til the auxiliary winding can t a ke ov er . this depends on the c o nfigured sof t st art time, the load on th e ou tp ut a n d t h e va lu es of the secondary cap a citors . but usua lly the min i mum valu e of the ca p a citor is de te rm ined b y o t h e r factor s, so me wor s t case test s to de te rm ine the min i mum valu e of th e vcc cap a cito r ar e: ? no- l oa d ope ra tio n th e su ppl y ru ns a t low fr equ en cy so the r e is a lo ng inter v al b e tween two co nsecutive charge pulses from th e auxiliary winding. v cc sh ou ld no t dr op n e a r v th (uv l o) be fo re the next cyc le. dur i ng n o - l oad o p e r atio n ke ep a h ealthy mar g in ( > 2 v ) betwee n th e minim u m v cc valu e and th e upp er d a t a she e t l i mit o f v th (uv l o) . t h is m a rg in pr ev en t s u n i nte n tio na l trig ge ring of uvlo due to the produ ction spre ad a nd the tem per atur e dr if t o f e x ter n a l comp on ent s. it also impr oves th e i mmu nity to exter nal d i stur ba nces. ? t r an sient fr om full loa d to no loa d a tr an sie n t fr om full loa d to no loa d may cause a small o v e r sho o t o n the ou tp ut vo lt ag e . be ca us e of th e ab se n c e of a n y ex te rn al loa d it m a y t a ke a lo ng t i me f o r th e o u tput ca p a cito r to dischar ge to the le ve l a t which the supply st art s to switch again. during that time the vcc ca p a citor is not charged by th e aux iliary w i nding. this o v e r sho o t can be limited b y the follo wing mo difyin g loo p : ad d r25 an d c17 in fig u r e 1 at e.g. 3.9 k ? and 1 nf respectively. fig 8. symme tric c h a r ge p u mp circu i t (pr even t s c1 fr om b e ing c h ar ged ) 019aaa164 cx1 c11 + c7 c1 vcc r2 3 m 20 k 4.7 nf r1 3 m l n 20 k 4.7 nf
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 17 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller the vc c cap a citor should be a low esr type. 3.2 .6 s t art-up condition s wh en t h e vc c p i n re ac he s v st ar t up (2 0 .6 v t y p. ), th e co nt ro ller wa ke s u p fr om po wer - d o w n m od e an d ch ec ks if t h e fo llo win g c o n d i tion s ar e me t: ? th e protect pin mu st be b e twe e n 0 . 5 v an d 0.8 v . ? th e vinsense pin must b e betwee n 0.94 v an d 3.52 v . ? th e optimer pin mu st be b e low 1.2 v . if one or more of these condit ions is not met, the controlle r w ill not switch. due to the inc r eas e d power consum ption when the ic is switc h ed on, the volt age on the vcc will ev entually drop below v th (uv l o) and the ic will enter power- down mode. the st art-up circui t will charge the vcc cap a cito r and the cyc le repeat s it self. 3.2 .7 s of t s t art whe n all st art- up con d itions ha ve b e e n met, the ic ch ar ges th e sof t st ar t cap a citor by switching on a 55 ? a cu rr ent so ur ce on the isense pin . as soo n as th e isense p i n reaches the internal control volt age (which is 0.5 v when the output is s t ill low), the current so ur ce is swit che d o f f an d th e controller st art s to sw itch. at st art-up the output c a p a c i tors are s t ill empty and the c ontrol input will as k for max imum p eak cu rr en t, incre a sing the p r im ary du ty cycle un til v i sens e re aches 0.5 v . bu t b e cause o f th e cha r g ed so f t st art ca p a citor , the volt ag e o n v is ense is alr ead y 0.5 v . as the sof t st ar t r e si st o r di schar ge s t h e s o f t st a r t ca p a ci to r , th e pe ak cu rr ent slo wly incr eases. th e pu rpo s e of the so f t st ar t is to a v o i d au di ble n o ise at st a r t- up. in crea sing pe ak cu rr ent in st a n tly fro m 0 a to ma xim u m would be au dib l e. a sof t st a r t d u r a tion o f 4 m s is a g ood valu e fo r mo st app lications. fig 9. s t art-u p se qu enc e, n o r mal o p e ration a n d r est ar t se qu enc e 019aaa165 output v oltage optimer pr o tect vinsense isense v cc v star tup v th(uvlo) v det(vinsense)(h) v star t(vinsense) v det(pr o tect)(h) v det(pr o tect)(l) 4.5 v charging vcc capacitor star ting con v er ter nor mal oper ation (po w er do wn) protection restar t soft star t 1.2 v soft star t
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 18 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller th e du ratio n of the so f t st ar t can b e co nfigu r e d by cha n g i ng the valu e of th e so f t st ar t cap a citor . ( d o not use the sof t st a r t re sistor for th is p u rp ose as this r e sisto r also con f ig ur es th e ov er po we r co mp e n sa tio n . i t is be tt er to fir s t con f ig ur e th e over po we r comp ensatio n a nd later ch an ge the sof t st a r t ca p a cito r to obt a i n the r equ ire d so f t st ar t time) . t he dura tion of th e sof t st ar t is ro ugh ly e qua l to : . r st a r t ( s of t ) must b e a min i mal 12 k ? , other wise the 55 ? a cu rr en t sour ce is n o t b e abl e to charge the c a p a citor to 0.5 v and th e controll er will not s t art s witching. th e pu rpo s e of the extr a ser i es r e sisto r r13 is t o filte r ou t ne ga tiv e s p ik es th at wo u l d o t h e r w ise be r e ctified by th e inter n a l esd pr o t ectio n dio de, ch ar ging c5 a nd cau s in g a po sit i ve of fse t vo lt ag e on t h e is ense p i n . fo r hig h o u tpu t volt ag es, the pe ak cur r e n t m a y sho w a sh or t pe ak a t th e st a r t. th e emp t y o u tput ca p a cito rs beh ave like a shor t circu i t an d th e supp ly imm edia t ely g oes into con t in uou s con duction m ode . dur i ng this pea k the p o wer is limited b y the mi nimu m on - tim e. 3.2 .8 s afe res t art if a p r o t e c tio n is trig ge re d th e contr o ller stop s switch ing . dep end ing o n which pr otection is trig ge red and o n th e ver s io n of th e ic, the pro t ectio n causes a re st a r t or la tch e s the con v e r ter to a n of f- st ate. se e section 3 .3 fo r an o v e r vie w of th e pr ot ec tion f e a tu r e s . a r e st ar t caused by a pr otection qu ickly ch ar g e s t h e opt im e r p i n to 4. 5 v . t h e t ea1 73 3 the n ente r s po we r- do wn m ode u n til th e cap a cito r on th e optimer p i n ha s be en d i scha rg ed by the r e sistor on the optim e r pin to 1 . 2 v . dur i ng power - d o wn mo de the power cons umption is very low (10 ? a) an d th e vcc pin is clamp ed to 21 .6 v (wh i ch is j u st abo ve v st ar t up ) by a n inter n a l clam p circuit. whe n th e optimer pin dr op s b e lo w 1.2 v an d vcc is ab ove the vcc st ar t- up vo lt age ( 20.6 v ) , the con t r o lle r wakes u p from po we r- do wn m ode a n d d oes a no rma l st a r t-u p as d e scr i be d in section 3 .2 . 3.2 .9 c lamp s th e 21 .6 v clamp on the vcc pin is only active during the restart delay. the purpose of the clamp is to keep the vcc pin just above v startup , so that after the restart delay the system will behave exactly like a normal start-up. t st art s oft ?? r st art soft ?? c star t s o f t ?? ? = a. sof t st art circui t b . s o f t st art wa veform f i g 1 0 . s o f t st art circu i t an d wavefo rm 019aaa166 v ctr l(ipeak) isense 4 esd r13 1 k r12 r11 0.15 q1 c5 220 nf 33 k 55 a 019aaa167 0.5 v 55 a current source charges capacitor v isense capacitor discharged b y resistor
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 19 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller th e 6 v cla m p on the vcc pin is o n ly active d u rin g latched of f- st ate. t he pu rp ose of th is clamp is to kee p the vcc pin ju st ab ove the latc h res e t lev e l. this is to ensure a fast latc h r e set af ter u nplu g g i ng the ma ins. it is r e comm end ed to kee p th e cla m p cu rr en t bel o w 0.2 m a. ( s o th e st ar t-u p cir c u i t shou ld n o t b e ab le to d e liver m o r e th an 0 . 2 m a a t ma xim u m main s volt a ge.) ab ove a cer t ain cur r e n t, the clam p beh aves like a cu rr ent sour ce: t he volt a ge incr eases an d th e curr en t r e ma ins co nst ant. if it is r e q u i re d t o a c h i ev e a ve ry fa st s t ar t- up time, it sh ou ld be ch ecked tha t a t the high est ma ins inpu t volt a ge, th e cur r en t d u rin g re st art or la tch ed of f-st a t e r e ma ins belo w 0 . 2 m a. 3.3 i n put volt age sensing (vinsense pin) 3.3 .1 g eneral f o r a ccu ra te in pu t vo lt ag e se ns in g it is b e s t t o se nse t h e in pu t vo lt ag e af t e r th e br id ge rectifier . the detecti on level s for st ar t-up , b r own out pr otection, and i npu t ovp ha ve b e e n d e signe d to be con nected to the r e ctified main s volt ag e via re sistor d i vid e r r a tio 1 : 1 22, e. g. 1 0 m ? an d 82 k ? . t o filter out th e rip p le o n th e rectified mains volt age, a c a p a c itor m u s t b e co nn ec te d. [1] a t full load ther e will be a r i pple on v bu lk but because of the high input volt age this r i pple will be ver y low . the mains input detection level at full load w i ll be approximately 5 v higher . f i g 1 1 . a pp li ca ti on vinsense pi n t a ble 4. detection levels vinsense pin v o lt a ge divi der as i n fig u re 7 : 3 ? 3.3 m ? and 82 k ? . vinsense pin det e ction voltages v ma in s (v (rms)) condition v bu l k (average v(dc)) vins ense pi n (v (dc)) v de t(h) (vinsense) = i npu t ovp 301 no load [1] 42 8 3 .52 v st a r t(vinsense) 80 no load [2] 111 0 . 9 4 v d e t( l) (vin se n s e) = brown out 61 0 v ripple on v bulk [3] 88 0.72 68 20 v ripp le on v bu lk 88 0.72 71 30 v ripp le on v bu lk 88 0.72 75 40 v ripp le on v bu lk 88 0.72 019aaa148 r4 3.3 m r5 3.3 m r6 3.3 m r7 82 k bd1 c1 c6 470 nf 5.2 v v det(h)(vinsense) = 3.52 v vinsense (to opp compensation isense pin) lowvin (to digital control) highvin (to digital control) brownout protection input overvoltage protection v star t(vinsense) = 0.94 v v det(l)(vinsense) = 0.72 v vinsense 5
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 20 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller [2] t he v s t ar t( vi ns e n se ) level is only r elevant w hen t he supply is not runn ing. in that case t here is n o load on v bu lk and th ere will be n o ripple . [3] t he browno ut detection level depends on the load. at a lower lo ad it a l lows a lo wer mains inp ut volt age . this is not a pr oblem because at a lo wer load the input cur r ent is also lower . fo r slightly dif f e r e n t d e tection le ve ls the r a tio of th e re sistor d i vi der ca n be cha nge d. increasing the divis i on fact or to 133 (3 ? 3. 3 m ? an d 75 k ? ) re su lt s in : ? input ovp lev e l = 329 v (r ms) ? s t ar t le ve l = 87 v (rms) ? br ownou t le ve l = 77 v (rms) ( a t 30 v rip p le o n v bul k ) 3.3 .2 s t art-up volt age th e contr o ller sh ould n o t st a r t up if th e main s volt age is too low . if vins ense is below v st a r t ( vi nsen se) (0.94 v typ.) the supply w ill not st art. there is 220 m v hys t eresis on this lev e l, so onc e the ic is sw itched on, it d oes no t sto p un til vi n sense is lowered below v de t ( l ) ( vi n sen se) (0.72 v t yp.). 3.3 .3 inpu t overvolt age protec tion switch ing at a mai n s volt a g e tha t is to o high m a y dam age the p o wer mosfet . if the volt a ge on th e vinsense pin e x ce eds 3.52 v the tea17 3 3 stop s switchin g an d initiates a safe rest art (v alid for all tea1733 vers ions). the mains volt age will s t ill be on the mosfet but it will not hav e to endure the extra coil v o lt age. if the i npu t ovp is not app re ci ated it ca n be d i sa ble d by co nne ctin g a zen e r diod e so th at the volt a g e o n th e vinsense p i n ca nno t r i se abo ve 3 . 52 v . low vo lt ag e zen e r d i ode s h a ve to o much le akage fo r the hig h - i mpe dan ce of this pin, so it is better to use a h i gh er (e.g. 24 v zener value and connect higher in the resistor divider), see figure 12 . it is also po ssib le to just incr ease the va lue of the in put ovp . in th at case a resistor shou ld b e placed in se rie s with th e zen e r d i ode in figu re 1 2 . above 383 v (3 v on vinsense p i n), the ze ner diod e st art s to co ndu ct. part of th e cu rr en t flows thr o u gh the ze ne r dio de a nd the ser i es re sistor . the re su lt is tha t th e inp u t volt ag e tha t is r e q u ir ed to re ach 3.5 2 v on the vinsense pin increases, depending on the value of the series resistor. fi g 12 . d i sab li n g in pu t ovp 019aaa149 r4 3.3 m r5 3.3 m r6b 560 k r6a 3.0 m r7 82 k bd1 c1 c6 470 nf vinsense 24 v
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 21 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller th e inp u t volt a g e com pen sa tion of th e over po we r comp ensa t io n is a l so d e r i ve d from the vinsense pin. t o minimize the influence o f the ovp level mo dification o n th e opp comp en sa tio n it is re co mme nde d to ke ep th e vins ense pin u n d i stu r be d be lo w 3 v . 3.3 .4 b rowno ut protection whe n th e volt ag e on the vinsense pin d r op s belo w 0 . 7 2 v , the b r o w n o u t pr otection is a c tivated. the co ntro ller imm edi ately stop s swit ch ing an d initiates a safe re st a r t (valid for all tea1733 versions ). 3.3 .5 o verpower compen sation th e vinsense pi n is also u s e d to p r o v id e the inp u t vo lt ag e infor m ation n e e ded for th e ov er po we r co mp e n s a t i o n . t h e vo lt ag e is t r a n s l at ed in to a sm a l l cu rr en t an d inje cte d o n the isen se out p ut. on t h e is ense output the cu r r e n t is conve r ted in to a vo lt age a c r o ss a ser i es re sistor . at a h i gh in put volt ag e it cre a tes an o f fset volt a g e o n th e isense pin, limiting the maximum peak current. see section 3.5 fo r mo re a bou t the opp . 3.3 .6 filte r cap ac itor a capacitor (c6 in figure 11 ) dir e ctly on th e vinsense pin filte r s o u t the main s rip p le. fo r a time cons t a nt of a few 100 h z cy cles (e. g . 40 ms), so the cap a c itor v a lue should be: . th e cap a cito r also p r eve n t s the su pply swit ching o f f when th e re ctified ma ins vo lt age temp or ar ily dr op s b e lo w the b r o w n out level du rin g a sh or t ( 5 ms o r 10 m s ) main s in te rr uptio n. 3.3 .7 c lamp an in te rna l cla m p pr otect s th e pin ag ain s t inp u t volt a g e s that ar e to o hig h . t he clamp volt a ge is 5.2 v a t 50 ? a. the cla m p volt ag e re main s un chan ge d dur ing p o wer - d o wn. ( the clam p vo lt ag e onl y dr op s whe n v cc d r op s belo w 5 v .) 3.4 p rotection features 3.4 .1 g eneral ta b l e 5 shows which protection features lead to a safe restart and which to a latched off-state. see section 3.2.8 . c6 40 ms r7 ----- ---- ---- - - ?
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 22 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller [1] s witches of f and wa it s in power- down mod e until v cc r i ses above v st artu p . th is is not the same as safe rest ar t procedur e. 3.4 .2 inpu t ove r v olt age pro t ection (in put ovp) th e pu rp ose o f ovp is to p r o t e c t the p r im ary mosfet ag ain s t volt ag es that ar e too hig h . whe n th e mai n s volt a g e b e come s too h i gh ( v insense rise s ab ove 3.52 v) , the in put ovp is a c tivated . th e contr o ller immed i ately stop s switch ing a nd pe rfor ms a sa fe rest a r t ( v a lid for a ll tea173 3 versio ns). see section 3 .3 fo r the ap plication of th e vinsense pin . 3.4 .3 b rowno ut protection whe n the ma ins inp u t volt a ge is to o lo w (a nd with fu ll lo ad) , th e p r im ar y cu rr ent in crea ses, cau s in g incre a sed lo sse s in ma ny o f the p r im ary comp one nt s. th e pu rpo s e of the b r own out p r ote c tion is to pr otect the su ppl y a g a i nst over hea tin g a t inpu t vo lt age s th at ar e too low . when the mains voltage becomes too low (vinsense drops below 0.72 v), the brownout protection is activated. the controller imme diately stops switching and performs a safe restart (valid for all tea1733 versions). see section 3.3 for application of the vinse nse pin . 3.4 .4 inte r na l ov ert em perature protection (internal otp) whe n th e temp era t ure in th e ch ip rise s to abo ve 140 ? c, the internal o t p s e t s the co nt ro ller to t h e la tch e d of f-s t at e ( i n all t ea17 3 3 ver s io ns ). 3.4 .5 m aximum on-time pro t ection (t ea17 33l t/n2 and t e a17 33mt /n2 only) if a switch ing cycle d oes no t re ach the pe ak cu r r e n t se t by th e ct rl p i n, th e dr ive r p u l se will be ended by the maximum on-time protec tion. if this happens eight times in a row , the m a x i mu m o n - tim e pr ot ec tion t r ig ge r s a r e st a r t . th e pu rpo s e of this pr otection is to e n sur e a well defin ed re spon se to m a ins su pp ly dip s . 3.4 .6 o verpowe r protec tion (opp) when the rated output power is continuousl y exceeded for an adjustable duration, the opp is activated. the controller immediately stops switching and performs a safe restart or enters the latched off-state, depending on the version. see section 3.5 for more about opp. t a ble 5. pro t e c tion h a n d lin g t e a173 3 series protection restart versions latched versions t, p, at, bt lt, mt l t /n 2, mt /n2 ovp (vinsense pin high) r est a r t brown out (vinsense pin low) rest a r t otp (interna l) latch opp (optimer pi n) rest art l atch ovp (protect p i n high) l atch otp (prot e ct pi n low ) latch undervoltage lockout (uvlo) restart [1] latch maximum on-time protection no action restart
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 23 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3.4 .7 o utput overv olt age protecti on (ou t put ovp) th e pu rpo s e of the ovp is to pr otect the d e vice s con nected to the o u tput bu t also the sup p ly it se lf ag ainst o u tpu t volt a ges th at a r e too h i gh ( e .g. wh en the volt a ge fee dba ck loo p is distu r b ed) . if an overvoltage at the output occurs, the a pplication pulls the protect pin above 0.8 v and the ovp is activated. the controller i mmediately stops switching and enters the latched-off state (in all tea1733 versions). see section 3.8 for how to a p p l y the protect pin. 3.4 .8 e xternal ove r t emp erature protection ( e x ternal otp) when the temperature in the supply rises abov e the rated level, the application pulls the protect pin below 0.5 v and the otp is ac tivated. the controller immediately stops switching and enters the latched-off state (in all tea1733 versions). see section 3.8 fo r h o w to ap ply th e protect pin. 3.4 .9 latc hed protec tion wh en o n e o f th e pr ot ect i on f e a tu r e s t r ig ge r s the latche d of f- st ate, th e ic imme diately stop s switchin g an d enter s po we r- do wn m ode . it clam p s th e vcc pin to 6 v , wh ich is just a bove the r e set level (5 v) . 3.4.1 0 rese tting a la tched protec tion in or de r to rese t a latche d pr otectio n , th e vcc pin sho u ld b e br oug ht b e lo w 5 v . if a la tche d pr otection is tr igg e re d, th e vcc pi n is auto m atically clam ped to a volt age ju st a bove the r e set level. as so on a s the ma ins is un plu gge d, th e st a r t- up cur r en t stop s a nd the vcc cap a citor is discha r ge d by th e 10 ? a supp ly cur r e n t to the t e a1 733 . be ca use it o n ly h a s to b e dischar ge d fr om 6 v to 5 v it re se t s qu ite fa st. with c vcc =4 . 7 ? f the d i scha rg e tim e is 0 . 4 7 s ( i n p r a c tice the st ar t- up cur r e n t doe s no t a l wa ys im med i ately stop ch ar ging the vcc ca p a cito r a f te r unp lug g ing the mai n s be ca use the x-c a p may still be char ged for about one second). 3.4.1 1 underv olt age lockout (uvlo) if v cc dr op s be low v th( u vl o) th e i c im me d i at ely s to p s sw itch in g. t h e pu rp os e o f t h e uvl o p r ote c tion is to pre v ent th e v cc volt a ge fro m dro p p i ng so mu ch tha t the driver pin can not su f f icien t ly dr ive th e mosfet a n ymor e. ke ep a h e a l th y m a rg in (> 2 v ) be tw ee n th e min i m u m v cc va lu e (u su ally du rin g n o - l oa d o per ation ) an d th e up per dat a sh eet limit o f v th (uv l o) . th is ma rg in pr event s un intentio nal trig ge ring of uvlo d u e to the pr od uction spr ead a n d the te mpe r atur e dr if t o f e x ter n a l comp on ent s. it also impr oves th e i mmu nity to exter nal d i stur ba nces. tea17 3 3 t , tea1 73 3p , tea173 3a t , tea17 3 3 b t ? whe n du rin g nor ma l o per ation th e vcc volt a g e d r o p s be low th e und er vo lt ag e lockout thre shold ( v th (uv l o) = 12.2 v ty p. ), the ic sto p s switch ing and en te rs po we r- down mod e . th e vcc pin is clamp e d to 21 .6 v (typ.) by an internal clamp circ uit. the st art-up c ircuit will charge the vcc c a p a c itor and a n o rm al st a r t- up seq uen ce fo llows.
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 24 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller a re st a r t ca used b y un de rvolt a ge lockou t is n o t exactly the same a s a r e st ar t cau s e d by one of the othe r protection features. it will no t trigger the res t art delay (s o it w ill not charge the optim e r cap a citor a nd wait s until it is disch a r ged aga in) . tea17 3 3 l t/n2, t e a1 733 mt/n2 ? duri ng no rma l ope ra tio n if vcc d r o p s belo w the u nde rvolt a ge locko u t thr e shold , th e ic is se t to the l atch ed pro t ectio n mo de . t his en su re s th at a sh or te d ou tp u t a lwa ys trig g e r s la tch e d pr ot ec tio n m o de , als o if vcc d r o p s be lo w v th (uv l o) b e for e opp has a chan ce to r e spo nd. 3.5 o verpower protection (opp) 3.5 .1 c ontinu ous and temporary out put power limit a t ion th e tea17 33 ha s two mecha n isms to p r o t e c t aga inst o v e r lo ad : ? ov er po we r pr ot ec tio n ove r p o wer p r o t e c tion p e r f o r m s a safe re st art (o r en te rs th e la tche d pr otection mo de in the latched v e rsion) if th e rated power is c o ntinuously e x ce ede d. opp is dela y e d to a llow tem por ar y o v e r lo ads. ? cyc le by cyc le primary in du ct or cu rr en t limit ation pe ak cu rr en t lim i t a tio n pr ev en t s t h e c o r e fr om go ing into satu ra tio n an d th us th e m osf et f r o m cu rr en t s t h a t ar e to o hig h . 3.5 .2 h ow the opp o perates whe n th e inter n a l con t r o l volt a ge excee d s the over power th re sh old ( 400 mv o n the isense pin), the overpower timer is activated (see figure 17 on page 31 an d figure 21 on page 33 . an in te rn al 10 .7 ? a current source charges th e ex te rn al cap a c i to r o n th e optimer p i n. wh en the o v e r p o wer co ndition la st s lon g en oug h to ch ar ge the opt i m e r pin to 2 . 5 v , the contr o ller ca rr ies out a safe re st a r t pr ocedu re ( o r enter s l a tch ed p r ote c tion m ode in th e latch e d ver s ion s ) . if the in te rn al co ntro l vo lt age d r o p s b e low 400 mv b e for e th e optimer pin r each e s 2 . 5 v , the opt i m e r cap a citor is imm edia t e l y d i scha rg ed . th e minimu m re co mmended value for o ptimer resist or is 47 0 k ? ( o the r wise ther e is a cha n ce that 10 .7 ? a is not s u f f icient to c h arge the cap a citor to 2.5 v). 3.5 .3 p eak current limit ation (ocp) whe n th e volt ag e on the isense pin exce ed s 50 0 m v th e cu rr en t switchin g cycle is imm edia t e l y e nde d. wh en the ocp limit s th e pe ak cur r ent, the outpu t volt a ge can n o longer be maint a ined. the converter will continue to s witc h until the opp is triggered or until v cc has dr opp ed b e low v th (uv l o) . 3.5 .4 inpu t volt ag e compe nsation in fixe d fr eq ue ncy dcm the pea k cur r e n t lim it a tio n ca n als o a c t a s over po we r pr otection b e cause the m a ximum o u tput po we r is in dep en den t of the inp u t vo lt age . but in fixe d fr eq ue n cy ccm th e m a x i m u m am o u n t of p o w er th at can be tra n sfe r r ed to the ou tput d oes not only depend on t h e primary pe ak current but also on the dut y cycle and therefore also on t h e in pu t vo lt ag e. th e tea17 33 ha s b u ilt-in in put volt ag e comp ensation to e n sur e accura te over power p r ote c tion , ind e p end en t of th e inp u t volt a g e . it ha s b een im plem ente d by m a king the current sense signal dependent on the input voltage measured on the vinsense pin.
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 25 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller the input voltage measured on the vinsense pin is internally converted to a current and injected in the isense pin. the current flow s through the external series resistor r12 (see figure 1 ) on th e isense p i n, co nver tin g it to a volt ag e. the valu e of th e se rie s r e sisto r sho u ld be tu ned in such a way tha t the ma xim u m p o wer be co mes ind e p end en t o f the in put volt ag e. 3.5 .5 h ow to config ure the current s ense res istor be fo re th e co rr ec t va lu e of th e cu rr en t s e n s e r e s i sto r can b e ca lcu l at ed , t h e m a xim u m primary peak current must be calculated. this is done with equation 2 or equation 3 . in dc m mode: (2) in cc m mode: (3 ) wh er e: ? i p eak is the p eak cur r ent ? p o is th e maximu m co ntinu ous ou tp ut p o wer ? ? is th e expe cte d ef ficie n cy of th e flyb ack a t ma xim u m ou tp ut p o wer ? v i is th e m i n i m u m in pu t vo lt ag e (= ? 2 ? the min i mum m a ins volt ag e) a t which the su pp ly mu st b e a b l e to de live r th e ma xim u m co nt inu o u s ou tp ut p o w e r 2 ? n is the wind i ng r a tio of th e co il ? v o is th e ou tp ut vo lt age ? f sw is the switc h ing frequency now th e (m aximum ) cu rr en t sen s e r e sisto r value ca n be calcula t e d with eq uation 4 : (4 ) wh er e: ? i p eak is the p eak cur r en t ano t h e r wa y to dete rmin e th e cor r ect va lue fo r the se nse re sistor is by tr ial an d er ro r: 1. co nn e c t a lo ad to t h e ou tp ut a n d se t th e lo ad to t h e ra te d m a x i mu m c o n tin uo u s ou tp ut p o wer o f the a pplication . 2 . app l y the minimum mains voltage at which the supply must be able to deliver the maximum continuous output power. 2. t he peak cur r ent will be lar ger d uring the valley of t he mains ripple. so during the ma jor i ty of the time i pe ak ? r i s en se ex cee d s v th (s e n s e )o pp . t his is w i ll h owever not tr ig ger the opp because eac h 100 hz or 1 20 h z cycle du rin g the top of t he ripple i pe ak ? r isense will be just below v th(sense)opp and this discharges the optimer capacitor. i peak dcm ? 2p o ? ? l ? f sw ? ---- ---- ---- --- ---- ---- -- - = i peak ccm ? p o ? -- --- - v i nv o + v i nv o ? -- ---- ---- --- ---- ---- - 1 2l ? f sw ? ---- ---- --- ---- ---- ---- - - v i nv o ? v i nv o + ---- --- ---- ---- ---- -- - ? + ? = r isense v th sense ?? opp i peak -- --- ---- ---- ---- ---- --- ---- - - 40 0 mv i peak ---- ---- ---- ---- -- - ==
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 26 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3 . incre a se the cur r e n t se nse re sistor u n til th e su pply keep s r u n n in g and th e optimer pin remains just below 2.5 v . 3.5 .6 c alcu lating the maxim um temp ora r y output po wer the maximum temporary peak current can now be calculated with equation 5 : (5) wh er e: ? i p eak (ma x) is the maximum peak c u rrent no w t h e m a xim u m t e m p or ar y o u tp u t po we r ca n be ca lcu l at ed 3 . in dc m mode: (6 ) wh er e: ? i p eak (ma x) is the maximum peak c u rrent in cc m mode: (7 ) wh er e: ? i p eak (ma x) is the maximum peak c u rrent th is is th e maximu m te mpo r a r y outpu t po wer a t which the ou tp ut vo lt age rem a ins int a ct. v i is the va lue o f the r e ctified main s volt ag e du rin g th e valley of th e rip p le. if the tem por ar y o u tput po we r is n o t high e nou gh , the o n ly way to incre a se it is by d e cre a sing the curr en t se nse r e sistor value . t h is also in cr ea se s th e ma xim u m con t in uou s o u tput po we r . 3.5 .7 h ow to config ure the opp compens ation (r st ar t(s o f t ) ) once th e curr en t sen s e r e sisto r valu e has be en de te rm ined , the sof t st a r t re sistor can be tun ed to ob t a in eq ua l m a ximum o u tput po we r for lo w an d hig h main s. th e re lation sh ip be twee n th e volt ag e on the vinsense pin a nd the r e sulting co m p e n s a t i on cu r r e n t ou t of th e isen se p i n is f i xed in t h e ch ip (s ee figu re 1 3 ): (8) wh er e: 3. calculating the maximum temporary output power is complicate d because it depends on the mains ripple on the bulk capacitor, which itself depends on the output power. i peak max ?? v sense m ax ?? r isense ------------ ---- --- ---- --- - 50 0 mv r isense ---- ---- ---- ---- --- - == p om a x ?? , dcm ? 12 ? ? l ? i peak max ?? ?? 2 ? f sw ? = p om a x ?? te mp , ccm ? v i nv o ? v i nv o + ---- --- ---- ---- ---- -- - ? i peak max ?? v i nv o ? 2l ? f sw v i nv o + ?? ? ? -- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- - ? ?? ?? ? = i opp 0.71 10 6 ? ? v vinsense 0.43 1 0 6 ? ? ? ? 0.7 1 10 6 ? kv bulk a v ?? 0. 43 10 6 ? ? ? ? ? ? ==
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 27 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller ? v vi nse n se is th e volt ag e on the vinsense pin ? v bu l k( av) is th e av er ag e re ct ified mains volt age ? k is th e r a tio of the re sistor divider on th e vinsense pin ( a r o u nd 1 : 1 2 2 fo r un iversa l ma ins) th e re su lting pe ak cu rr ent re duction ( ? i pe ak in equ ation ) can be ca lcu l ated with equation 9 : (9 ) wh er e: ? ? i p eak is th e pe ak cu rr e n t re du ct ion ? r st a r t ( s of t )(t ot ) is the tot a l resist anc e from the is ense pin to the cur r e n t sen s e resistor (r12 + r13 in figure 1 ) ? r isense is the value of the current sense resistor (r11 in figure 1 ) ? k is the r a tio of th e re si stor divider on the vinsense p i n (e .g. 1 : 12 2) section 3.5.5 describ es h o w to calcu l ate th e pe ak cur r ent and th e re su ltin g ou tp ut p o wer withou t in put vo lt ag e co mpe n sation . t o calculate the o u tpu t po we r with i npu t volt a ge compens a t ion, the ? i pe ak mu st be subtr a cte d fr om the pe ak cu rr ent befor e calcula t in g th e ma xim u m ou tp ut powe r . although it s h ould be poss ible to c a lculate 4 the op tim a l valu e o f th e sof t st ar t re sistor , it is p r ob ab ly faste r to tune it in the ap plication . 1. connect a load and set it to the rat ed ma xim u m contin uou s ou tp ut powe r of th e flyback convert e r . 2. apply the highest rated input voltage (usually 264 v (ac)). fig 13 . o v e rp ower co mp ens a tio n cu rr ent isen se p i n as a fun c ti on o f vinse n se pi n vo lt ag e 4. exact calculation is complicated because the vinsense pin measures the aver age bulk voltage but the maximum continuous output power depends on the top of the ripple. 019aaa150 0 0 1 i opc(isense) ( a) 2 3 0.28 v vinsense (v) 1.7 2.0 ? i peak i opc i sen se ?? r st art soft ?? to t ?? ? r isense -------------- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- ---- ---- ---- -- - = 0. 71 10 6 ? kv ia v ? ?? 0.4 3 10 6 ? ? ? ? ? ? ?? r s t art s of t ?? tot ?? ? r isense --- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- ---- --- --- - =
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 28 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3 . incre a se the sof t st a r t re sistor valu e un til the volt a ge on th e optimer p i n alm o st ex ce ed s 2.5 v (e .g . s t art w ith 15 k ? ). now th e maximu m outp u t p o wer a t the m i nimu m a n d the m a ximum in pu t volt ag e shou ld b e exactly the same . remarks: ? t h e va lu e of th e to t a l sof t st a r t r e sis t an ce ( th e s u m o f r1 2 an d r1 3) sh ou ld n o t b e lo we r than 1 2 k ? , othe rwise the 55 ? a cu rr en t so ur ce m a y no t be a b le t o ch ar ge th e sof t st a r t ca p a cito r to 0.5 v d u r i ng st ar t- up . ? cha ngin g the sof t st a r t resistor valu e al so slightly i n fluen ce s the m a ximum o u tput p o wer a t ab so lute min i mum in put vo lt ag e. so a f te r con f ig ur ing r st a r t ( s of t ) it shou ld be chec ked if it is neces sary to re tune th e cu rr en t sense r e sisto r . ? th e ou tp ut p o wer a s a fun c tio n of the inpu t volt a ge is n o t a linea r fun c tion (see figure 14 ) . whe n the m a ximum outpu t p o wer has be en tu ned to be e qua l fo r the absolute highes t and lowest input v o lt ag e, the actual maximum output power will be sligh t ly hig her between th ese limit s. an ot he r way to c o n fig ur e th e co mp e n sa tio n is t o tu ne it in su ch a wa y t h a t t h e ma xim u m outpu t po we r a t nom inal low ma ins ( 1 1 5 v) is e x actly e qua l to the ma xim u m output power at high mains (230 v). in that c a s e the maximum output power will be e x a c tly r i gh t at the no mina l inpu t volt a ges , som e wha t lower at th e absolu t e minim u m a nd ma xim u m inp u t vo lt age and so mewha t h i ghe r be twe en the h i gh a nd lo w no mina l in put vo lt ag e. ? fo r accur a te over po we r comp ensatio n it is best to connect the vinsen se input volt a ge af te r th e br idg e re ctifier . ? at lo w in put po we r , th e opp co mpe n sation is switched of f so th at th e minim u m pe ak cur r e n t is no t influe nced b y the opp com pen sa tio n cur r en t. ? the maximum temporary output power also depends on the input voltage. when the opp compensation has been configured op timally for the maximum continuous output power, it will not be compensated optimally for th e maximum temporary output power. see figure 15 .
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 29 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3.5 .8 h ow to disa ble the opp compe nsation (for dcm) in dcm , the ma xim u m ou tp ut power doe s n o t d e p end o n th e ma ins volt a g e , so th er e is no th in g to be c o m p en sa te d. th e ob vio u s wa y to disab l e th e opp co mpe n sation wo uld be to r e d u ce th e sof t st ar t re sis tor t o 0 ? , bu t tha t wou l d ca use a pr ob lem at st a r t- up: the tot a l so f t st ar t re sist a n ce ( t h e sum of r1 2 an d r1 3) sho u ld b e at le ast 1 2 k ? , othe rwise the 55 ? a current source ma y n o t b e ab le to cha r g e the sof t st a r t r e sistor to 0.5 v dur ing st ar t-u p . f i g 1 4 . m a x i mum co nti n u o u s ou tpu t p o w e r a s a fu nc ti on of in pu t v o l t a g e fig 15 . m aximu m te mpo r ar y ou tp u t p o wer as a fun c tion o f in pu t v o lt a g e mains input voltage (v (rms)) 80 260 240 160 200 120 100 180 220 140 019aaa171 70 75 65 80 85 60 maxim um contin uous output po w er (w) not compensated compensated mains input voltage (v (rms)) 80 260 240 160 200 120 100 180 220 140 019aaa172 85 75 95 105 maxim um tempor ar y output po w er (w) 65 not compensated compensated
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 30 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller the only way to disable the opp compensation is to clamp the vinsense pin as shown in figure 12 . in st ea d of cla m pin g it t o 3 v it sho u l d b e clamp ed to e.g. 1.2 v so tha t the clamp disable s mo st of th e opp co mpe n sati on witho ut in flu e n c in g the st ar t- up a nd b r own out dete c tion le ve ls o n vinsense. of co ur se this also disab l es th e inp u t ovp . ( t o cla m p a t ap p r o x im at ely 1. 2 v : r6 a = 1. 8 m ? , r6b = 1.6 m ? ). 3.5.9 opp delay a nd rest art de lay if a sh or te d ou tp ut o ccu rs , th e su p p ly ke ep s switching on an d of f ( o n l y valid for th e n on- latched ve rsion ) . t he r a tio of th e on- time an d of f-time can b e man i pu lated to contr o l the m a ximum a v e r a ge ou tp ut power . bo th ti m i ngs ar e defin ed at th e optimer pin. see se ctio n 3 . 7 on p a g e 33 for opt i m e r pin in fo rm ation. 3.5.1 0 disab ling the o verpower pro t ection if the opp is not ap pre c iated it ca n be disa bled b y con necting a 1 8 0 k ? re sistor fr om the op ti me r p i n to gr o u n d . be ca us e of th e 18 0 k ? res istor , the 10.7 ? a cu rr ent so ur ce o f th e opp is n o t a b l e t o ch ar ge t h e cap a citor to 2.5 v anymore (10. 7 ? a ? 18 0 k ? =1 . 9 v ) . th e 18 0 k ? r e sisto r also influe nces th e re st a r t del ay , b u t th is can be co mpe n sated b y choosing a higher o pti mer c a p a cit o r value. it is not re co mme nde d to re duce the r e sisto r value b e lo w 10 0 k ? , so th at th e inter nal 10 7 ? a cu rr en t sour ce is alwa ys able to cha r g e th e optimer pin to 4.5 v in ca se of a r e st ar t eve n t. 3.5.1 1 lea ding edg e blank ing th e isense i npu t is in tern ally blan ked for th e fir s t 300 ns o f ea ch switch ing cycle to pr e v en t th e spik e ca us ed b y p a r a s i tic c a p a cit a nce ( gate- sour ce ca p a cit ance o f the mosfet and th e p a ra sitic ca p a cit a nce of th e tran sfo rme r) tr igg e rin g the pe ak cu rr ent co m p ar a t or p re m at ur ely . 3.6 c trl pin 3.6 .1 g eneral th e ctrl pin con t r o ls th e amo unt of outpu t p o wer . f i g 1 6 . l ea di ng e dg e bl an k i ng t leb v sense(max) v isense t 019aaa151 leb
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 31 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3.6 .2 inpu t biasin g an in te rna l resistor o f 7 k ? co nne cte d to 5 . 4 v en ab les d i re ct co nn ectio n of an o p tocoup ler tr ansistor withou t an y e x ter n a l co mpo nen t s , to co nver t the o u tput cu rr en t of the o p tocou p ler into th e contr o l vo lt ag e. t he r e lation sh ip be twe en the ctrl pin cur r e n t a nd ctrl pin volt a ge can b e ca lculated with eq ua tio n 10 (see figure 18 ). (1 0) 3.6 .3 p eak current control th e ct rl volt a g e set s the p r im ary pea k cur r e n t. the p r im ary cu rr en t is me asur ed by th e isense pin a nd is co mp are d to th e pe ak cur r ent se t b y the ctrl pin . as soo n as th e pr im ar y p e a k cu rr en t m e as ur ed by th e is ense p i n e xce e d s t h e lim it se t b y th e ct rl p i n, the driver outpu t is switch ed l o w . t he r e lationship between ctrl input and isen se ou tp u t is ca lcu l at ed wit h eq uatio n 1 1 . fi g 17 . c trl pi n, isense pi n a n d dri ver pi n 019aaa168 modula tion oscilla t or slope compensa tion +5.4 v ctrl u2-1 7 k 4.7 r15 10 r14 q1 d2 1n4148w 1 k r13 33 k r12 c5 220 nf c9 10 nf 7 4 isense vinsense (from vinsense pin) opp compensation 3 driver analog pr ocessing set dutymax s r q leading edge blanking stop frequency reduction v ctr l(ipeak) v ctr l(ipeak) (to overpower protection) v ctr l(ipeak) = (v ctrl ? 1.1) / 5.6 55 a 0 a to 2 a soft start switched on just before start-up until isense pin reaches 0.5 v r11 0.15 fig 18. v ctrl as a function of i o(ctrl) v ct r l 5. 4 v7 1 0 3 i oc t r l ?? ? ? ? = 019aaa169 1.8 i o(ctrl) (ma) 3.9 5.0 0 0 v ctrl (v) 0.5 0.2
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 32 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller (1 1 ) see figure 19 . 3.6 .4 freque ncy reduc tion at lo w outp ut power t o e n s u r e ef ficie n t o p e r a tio n at lo w o u t p u t po we r , th e pe ak cu rr en t ca nn ot b e re du ce d b e low 25 % of it s ma xim u m value . instead , to re du ce the o u tpu t po wer , the switchin g frequency is reduced. see figure 19 . it is impo rt a n t to use th e e n tire ct rl pin inp u t ra ng e. if the chosen cur r e n t se nse r e sisto r value is too low , only the low e r p a rt of th e contr o l cu rve is u s ed. this mea n s th at fr eq ue n cy re du ct ion a l re ad y st a r t s at a re lat i vely high peak current whic h may result in a udib l e no ise . if o v e r p o wer p r o t e c tion is no t ap pr eciated ( e .g. be ca use it is han dle d by a se co nda ry ic) , it ca n b e disab l ed ( s e e s e ct ion 3 .5.10 ). so if the overpower protec tion is not used, it is s t ill p o ssib le to use th e full inpu t r a n ge of th e ctrl inpu t. fig u r e 19 is v a lid for 66.5 k h z switc h ing freq u ency ver s ion s . for h i gh er switchin g fre q u ency ver s ions, th e sh ap e of the cu rves is the same, jus t replace 66.5 k hz by 9 1 .5 khz or 12 3 k hz. 3.6 .5 s lope compen sation to prevent subharmonic oscillation in cc m mode at duty cycles above 50 %, the tea1733 has built-in slope compensation. the slope compensation is internally added to the ctrl input signal (see figure 20 ) . refer r e d to th e isense p i n, th e amo unt of slo pe co m p e n s a t i on is 25 m v / ? s ( 33 m v / ? s for 91.5 khz switchin g fr eq uen cy versio ns a nd 44 mv/ ? s for the 123 khz version). the slope compensation is only active on duty cycles higher than 45 %. v ctrl ipeak ?? v ctrl 1.1 ? 5.6 -- ---- ---- ---- ---- --- ---- --- - = fi g 19 . v ct rl (ip e ak ) and f sw as a function of v ctrl 019aaa152 0 125 v ctrl (v) 0 0 66.5 500 1.8 1.55 3.9 v ctr l(ipeak) (mv) f sw (khz) fig 20. slope compensation waveforms 019aaa170 0 oscillator t / t (%) slope compensation 45 75 100
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 33 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3.7 o p timer pin 3.7 .1 o verpower delay and rest a r t d elay th e optimer pin pr ovide s two dif f e r e n t time co nst a n t s for : ? opp de lay (the time fro m exceed ing the p o we r limit to tr ig ge rin g th e pr ot ec tion ) ? rest ar t d e lay (the time fr om trig ger ing the pro t ectio n un til the ne xt re st ar t attemp t) bot h tim e r fu nc tio n s c a n be mor e o r le ss in dep end en tly a d justed. t he r a tio of th ese time s d e ter m ine s the ma xim u m po we r that can be d e liver ed whe n the sup p ly is c o ntinuously r e st ar tin g , e.g. if th e ou tp ut is shor ted. fi g 21 . optime r pi n 019aaa173 restart control optimer 8 restart 1.2 v 4.5 v 400 mv v ctr l(lpeak) v ctr l(lpeak) (from ctrl pin) driver (from driver pin) overpower protection 2.5 v qd 107 a 10.7 a r16 2.2 m c8 220 nf clamp (to 22 v clamp on vcc pin) restart (from digital control) overpwr (to digital control) pwrdwn (to digital control) fig 22 . o pt imer wavefo rms 019aaa174 v optimer v isense output v oltage 400 mv protection high load high load nor mal load v prot(optimer) output load
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 34 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3.7 .2 o verpower delay when the internal control voltage exceeds the overpower threshold of 400 mv, the overpower timer is activated (see figure 21 ) . an in te rn al 10.7 ? a cu rr en t sou r ce char ge s the e x ter n a l optimer cap a citor ( c 8) . when th e over powe r co nd itio n last s lo ng e nou gh to cha r g e the optimer p i n to 2 . 5 v , th e con t r o lle r car r i es ou t a safe r e st ar t pr ocedu re (o r e n ter s la tche d pr otection mo de in the la tch ed ver s io n) . if the in te rn al co ntro l vo lt age dr o p s b e l ow 40 0 m v b e f o r e th e opt im e r p i n rea c hes 2.5 v , th e optimer cap a citor is imm edia t e l y d i scha rg ed . th e minimu m re co mme nde d value for th e optimer resistor (r 16 ) is 4 7 0 k ? ( o ther wise th ere is a cha n ce th at 10.7 ? a is not suf f ic ient to charge the cap a citor u p to 2.5 v ). the opp att a ck tim e ca n be calcula t ed with eq ua tio n 12 . (1 2) wh er e r = r op timer (r16 ) an d c = c opt i me r (c8 ) . 3.7 .3 r est a r t delay whe n a safe re st a r t pro cedu re is tr igg e r ed by on e of th e pr otectio n featur es (via the vin sense pin or the optimer pin), the op timer cap a citor will be quick l y c h arged to 4 . 5 v by an in te rna l 107 ? a cur r e n t sou r ce. the t e a1 73 3 enter s po we r- do wn m ode a n d d oes not st art ag ain un til the e x te rna l resi stor o n th e optimer pin ha s d i scha rg ed the cap a citor to below 1.2 v . th e re st a r t tim e co nsist s of 2 pe rio d s: 1 . cha r g i ng the cap a citor fr om 2.5 v to 4 . 5 v by a 10 7 ? a cur r ent so ur ce . 2 . disch ar ging th e ca p a cito r fr om 4 . 5 v to 1.2 v by the e x te rn al re sistor . th e re st a r t tim e is ma inly deter min ed by the cap a citor dis c harging from 4.5 v to 1. 2 v by r op timer ( eq ua tio n 13 ). (1 3) wh er e r = r op timer (r16 ) an d c = c opt i me r (c8 ) . fo r a mo re a c cur a te calcula t io n the time r equ ire d to ch arg e the cap a citor fro m 2.5 v to 4 . 5 v should also be calculated and added to the discharge time ( equation 14 ). (1 4) wh er e r = r op timer (r16 ) an d c = c opt i me r (c8 ) . 3.7 .4 h ow to config ure r and c th e cap acitor value has the same influence on both delays. when the resistor value is large enough (> 2 m ? ) it only influences the restart delay. so tuning these components is most convenient in the following order: t opp r ? c ? 1n 1 v pr ot optimer ?? ri pr o t o p t i me r ?? ? --- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- - - ? ?? ?? r ? c ? 1n 2.5 v r 10.7 ? a ? ---- --- ---- ---- ---- ---- --- --- - ? = ? = t res t a r t , disch e ar g r ? c ? 1n v rest art o pti m er ?? lo w v res t art o ptime r ?? high --- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- --- - ?? ?? r ? c ? 1n 1. 2 v 4. 5 v ---- --- ---- - - ? = ? = t restar t , ch e ar g rc ? 1n 1 v prot optimer ?? ri r estart o ptimer ?? ? --- ---- --- ---- ---- ---- --- ---- ---- ---- ---- --- ---- -- - ? ?? ?? 1n 1 v r estart o ptimer ?? hig h ri rest art o pti m er ?? ? ---- ---- --- ---- ---- ---- ---- --- ---- ---- ---- --- ---- -- - ? ?? ?? ? ?? ?? ? = rc 1 n 1 2. 5 v r 107 ? a ? ---- ---- --- ---- ---- ---- ---- - ? ?? ?? 1n 1 4.5 v r1 0 7 ? a ? - ---- --- ---- ---- ---- ---- --- - ? ?? ?? ? ?? ?? ? ? =
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 35 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 1. t u n e or ca lcu l at e th e cap a c i to r v a lu e to o b t a in th e re qu ire d o pp tim e . 2. tune or ca lcu l at e th e re sist or va lue t o ob t a in t h e r e q u i re d re st a r t tim e . som e examp l es of opp d e lay an d re st a r t dela y for so me dif f ere n t rc co mbi nation s a r e sh ow n in ta b l e 6 . 3.8 p rotect pin 3.8 .1 g eneral t w o pr ot ec tio n f e a tu r e s ca n b e im ple m en t ed o n th e sa me protect pin u s i ng on ly a min i mum n u mb er o f comp on ent s: ? ove r v o lt age pr otection ( outp u t ovp) ? ove r t e mp er atur e pro t e c tion (ot p ) th e pr otection featu r es on th e prot ect p i n ar e always la tche d (a lso in th e no n- latch ed vers ion). 3.8 .2 c ircuit de scription an in te rna l curr ent sour ce atte mpt s to ke ep the volt a g e o n the protect pin eq ua l to 0 . 6 5 v . th is in te rn al cu rr en t sou r ce ha s a r ang e of ? 10 7 ? a to +32 ? a ( i .e . it ca n sin k 10 7 ? a and so urce 3 2 ? a). if th e inter nal cur r e n t so urce is out of ran g e the p i n can no lon g e r b e ke pt in th e 0.5 v to 0 .8 v w i nd ow a n d a ctiv a t e s th e pr ot ec tio n . t a ble 6. exam ples of opp att ack time an d re st a r t time r optimer (m ? ) c optimer (nf) t opp (ms) t re st a r t (ms) ra tio t opp /t res t art 2.2 100 25 2 9 3 1 :12 2.2 220 54 6 4 4 1 :12 2.2 470 1 1 6 1 376 1:12 1 220 59 2 9 5 1 :5 4.7 220 53 1 371 1:26 f i g 2 3 . p rotect pin 019aaa153 ntc 470 k at 25 c 11.2 k at 110 c r17 5.1 k 1 % c10 100 nf 4.1 v 0.8 v 0.65 v prothigh zd1 bzx84j-b24 vcc protect 6 r ovp (option) 0.5 v protlow current source sinks up to 107 a or sources up to 32 a to keep protect pin close to 0.65 v -30 0 0.50 0.65 0.80 100 i o(protect) (ma) v protect (v)
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 36 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 3.8 . 3 o utput ove rv olt age pro t ection output ovp is activated when the vcc voltage exceeds the voltage of the zener diode (at 107 ? a) plus 0.8 v. the ovp can be tuned by placing a resistor (r ovp in figure 23 ) in ser i es with the ze ne r dio de. a ser i es re sistor o f 10 k ? incr ease s the ovp volt ag e by a ppr oxima t e l y 1 v ( ? v = r ovp ? 10 7 m a). 3.8 .4 o vertempe r a t ure protection th e otp is tr igge re d when the vo lt age o n the protect pin d r o p s belo w 0 . 5 v . th is h app ens when the resist an ce o f the ntc + ser i es resistor h a s d r o ppe d be low 0. 5 v / 32 ? a = 15.6 k ? . t he ot p is not influe nced b y vcc var i ation s be ca use the pro t ect p i n is in te rn ally b i as ed . t h e ot p is mo st accu ra te wh en the valu e of th e nt c is ch osen to be a s h i gh as po ssible . 3.8 .5 c lamp an in te rna l cla m p keep s th e protect p i n volt ag e at 4.1 v to p r eve n t d a ma ge to the protect pin in ca se o f spikes. t he clamp vo lt age is specified a t a 2 0 0 ? a input current ( t h e exact volt age d epe nd s on th e cu rr en t) . in power - d o wn mod e , th e cl amp volt a ge d r op s to a ppr oxima t e l y 2 v . 3.9 d river pin 3.9 .1 g ate drive r the driv er circuit has a current sourcing cap a bility of ty pic a lly 250 m a and a current sink cap a bility of typical ly 750 m a. this permit s fa st turn-on and turn-of f of the pow e r mosfet for efficient operation. see figure 17 on page 31 for driver p i n contr o l. 3.9 .2 freque ncy mo dulation the switching frequency and its harmonics are usually responsible for a large part of the conducted emi problems. modulation of the switching frequency spreads all frequency peaks that are related to the switching frequency over 8 khz wide bands, significantly decreasing the so called "average measurement". see figure 17 on page 31 for loc a tion of oscillator and fr equency modulation. the oscillator is c o ntinuously modulate d at a rate of 280 h z and a range of ? 4k h z . ( ? 5 k hz in 91 .5 khz switch ing fre que ncy ver s ions and ? 7 khz fo r the 12 3 khz ve rsio n) . fig 24 . f r equ en cy mo du la tio n 019aaa175 70.5 f sw (khz) 66.5 62.5 t 1 / t = 280 hz
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 37 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 4. w ays to reduce no-load power th is section d e scr i be s ho w the n o - l oad p o wer ca n be min i mized in a n y t e a1 73 3- based flyback convert e r . 4.1 r emove power led som e ad apter s have a led con n e c ted to th e ou tp ut to indicate tha t the powe r is pre s ent. a led cu rr ent of 2 . 5 m a su pplie d fr om a 2 0 v o u tpu t volt ag e alr e a d y a d d s 50 m w to the no - l oa d po we r . a (h igh ef ficiency) led in se rie s with th e led of the o p tocou p le r do es n o t a d d to the power cons umption but it s bright ness will slightly vary w i th the load. another option is to su pp ly th e l e d fr om a se p a rate low v o lt age winding. 4.2 c han ge the primary rdc clamp to a z e ner c l amp th e ad va nt ag e of th e zen e r clam p is tha t it o n ly co ndu ct s when it is r e a lly ne ed ed an d is in dep end en t of th e switchin g fr eq uen cy . comp ar ed to a resisto r diode ca p a citor (rdc) cla m p it r e d u c e s no - l oa d po we r bu t in cr ea se s co st s a n d emi . 4.3 m o dify rdc clamp with a zener diode a z e ne r dio d e in s e r i es wit h t h e r o f th e rd c cla m p pr ev en t s the c a p a cit o r fr o m alm o st en tir e ly dis c h a r g in g at ea ch swit ch ing cy cle whe n ru nn in g a t lo w f r e q u e n c y du r i ng n o lo ad . add i ng th e ze ner dio de in cr ea se s co st s an d ma y a l so incre a se emi ( but no t a s m u ch a s a ze ne r cla m p) . rep l acing r9 ( figu re 1 ) by a 10 0 v ze ne r saves 5 m w at 23 0 v ( a c) . f i g 2 5. z en er cl am p 019aaa176 fig 26. rdc clamp with zener diode 019aaa177
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 38 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 4.4 r eco nsid er st art-up time specification usually th e ma xim u m st art- up time o f a po we r supply is s p ecified at low nominal mains volt a ge ( 1 1 5 v ( ac)) . but occa si ona lly the ma xi mum st ar t- up time is specified a t the ab so lu te m i nim u m ma in s v o lt a g e ( 9 0 v (ac )). in this case it is worth recons idering this requirement: 90 v ( ac) will probabl y be enc o untered in less than 1 % of the field but to a c h i eve a 2 s st ar t-u p tim e at 9 0 v ( ac) re qui res 17 m w extra st ar t-u p powe r at 23 0 v ( a c) 5 . ano t h e r 1 1 mw can be sa ve d by allowing a maximu m st a r t-u p time of 3 s instea d of 2 s . se e figu r e f i g ur e 5 on p ag e 12 . 4.5 r edu ce vcc cap acitor value with a sm aller vcc ca p a cito r the ef ficiency o f the st ar t-u p cir c uit ca n be sign ifican tly imp r o v e d . ch ar ging o n ly half th e vcc cap a citor in the sam e tim e re quir e s on ly ha lf the p o wer . fo r a ma xim u m st ar t- up time o f 2 s a t 1 1 5 v (ac) , r edu cin g the vcc cap a cit a n c e from 4.8 ? f to 2.3 ? f a n d do ub lin g the s t ar t- up r e sis to r v a lu e s sa ve s ap pr o x im at ely 20 m w . 4.6 x -cap quality use a goo d qu ality x- ca p. a po or q u a lity x-cap ( 3 3 0 nf) m a y d i ssip ate a s mu ch a s 25 m w at 2 3 0 v (ac) a t 6 0 hz . a go od q u a lity x- ca p diss ip a te s le ss th an 2 m w . 4.7 x -cap value red u cing the value o f th e x-cap also de crea se s the x-cap los ses . it is better to s o lv e emi p r ob lems at the sour ce tha n by solving them with a ver y lar ge x-cap . re du cin g th e x- ca p valu e not on ly r edu ce s the lo sse s in the x- ca p it se lf b u t a l so in th e re qui red x- cap d i scha rg e cir c uit. 4.8 a ctive x-cap discharge rep l ace a p a ssive x- ca p dischar ge ( r e s istor ) by an a c tive dischar ge cir c u i t ( r e quir e s a h i gh volt a g e t ra nsistor ) . 4.9 a ctive st art-u p circuit rep l ace a p a ssive st ar t-up cir c u i t ( r e s istor s ) by a n active ch arg e circuit th at i s on ly active d u rin g st ar t- up ( r e quir e s a hig h vo lt ag e tr an sistor ). 4.10 in creasin g the impedance of th e vo lt age divider on vinsense w i t h r 4=r 5=r 6=1 0m ? and r7 = 2 4 0 k ? ap pr oximate l y 7 m w ca n be saved . in this case c6 can be reduc ed from 470 nf to 180 nf to k eep the same time constant. 5. if the two resistor start-up circuit is used and the vcc capacitance is 4.8 ? f (4.7 ? f + 100 nf).
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 39 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 4.1 1 in crease the impedance of the outp ut volt age divider doubling the impedance of the voltage divider on the output (r23 and r24 in figure 1 ) saves a ppr oxima t e l y 5 m w . in this case c1 6 a nd r2 2 a l so ha ve to b e a dap ted to keep the same loop r e spo n se. ho w h i gh the imp e d ance can b e incre a sed d epe nd s ver y mu ch o n th e lay o u t o f th e pcb a n d the in p u t cu rr en t of th e sh un t r e gu lat o r . 4.12 replacing the integrated shunt regulator (tl 431) by a discrete shunt regulator th e widely availa ble in te gra t ed tl 431 sh unt re gula t o r ver s io ns usually re qui re 1 m a for p r op er r e g u latio n . so me ma nufactur e r s specify 0 . 5 m a o r 0.6 m a. it is no t di f f icult to ma ke a lo w ( t e m pe ra tu re st ab le) d i scr e te alter n a t ive, se e fig u re 27 . 5. "zero w a tt" st andby power design ideas 5.1 l ess than 30 mw st andby power th e st and by p o wer ca n be r edu ced to less tha n 30 mw by switching the app lica t ion of f e n tire ly . (so n o outp ut vo lt age is availa ble . ) t he solu tio n s d e scrib ed in the follo wi ng sections do r e q u ire an exter nal sign al to switch th e su pply on o r of f. so the d e vice tha t is con nected to the p o wer supp ly switch es the pow e r sup p ly of f wh en it is n o lo nge r n e e ded . th is sho u ld be no pr ob lem for b a tte r y op era t e d equipm ent. 5.2 a ctive on fig u r e 28 sh ow s h o w th e su pp ly ca n b e sw itch ed o n by a n ex ter n al a c t i ve -o n co ntr o l sign al. t he comp on ents in red have to be added with respect to t he existing application. fig 27. discr ete shu n t re gu la to r 019aaa178 330 68 k 1 m 1 m 1 m 100 pf 8.2 v
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 40 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 5.2 . 1 s hut do wn sup p o s e the su pply is r unn ing a nd sud den ly the volt a g e o n th e exter nal po wer- on sig nal is mad e low . t he tra n sistor of th e optoco upl er b l oc ks an d th e cur r e n t t h r o u g h r 1 an d r2 is f o r c e d int o ze n e r d i od e zd x. t r an sis tor q x p u lls vi nsens e p i n lo w . t h e t ea17 3 3 immediately stop s switching. the auxiliary winding does not s u pply the ic anymore and th e vo lt ag e on t h e vc c p i n dr op s b e lo w v uvl o . the ic e n ter s power - down mo de. 5.2 .2 w ake -up whe n th e po we r- on sign al is ma de high, the o p tocou p ler co nd uct s . the vol t age o n the ze ne r dio de dr op s to 0 v an d stop s co ndu ct in g. qx blo c ks and th e vinsense pin is r e lea s ed. the cur r ent th ro ugh r1 a nd r2 no w cha r ge s the vcc cap a citor . t he st ar t- up time will be the same as the normal start-up time. 5.3 a ctive off fig u r e 29 show s how the supply can be sw itched o n by a n ex ter n al a c t i ve -o f f co ntr o l signal. the components in red have to be added with respect to t he existing application. fi g 28 . ? ze ro w att? a p p l i ca t io n with active-on control signal 019aaa179 10 m 10 m 10 m 240 k rx 56 k r2 3.3 m r1 3.3 m active-on control signal ("power-on") l n c6 180 nf c11 2.2 f 50 v vinsense vcc 5 1 tea1733 zdx 30 v qx ux bd1b bd1a bd1d bd1c
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 41 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 5.3 . 1 s hut do wn su pp os e th e sup p l y is ru n n in g an d th e ac tive - o f f con t r o l signa l is sudd en ly ma de high. th e tran sistor of the o p tocou p le r co nd uct s and two thin gs hap pe n: ? t r an sistor qx con d u c t s and pulls vinsense pin l o w . the tea1 733 im med i ately stop s switchin g and th e ic en te rs po wer- do wn mod e . ? vcc is clamped to 18 v which is just below v st a r t up . be cause of th is, tea17 33 cann ot d o any st a r t- up attemp t s . 5.3 .2 w ake -up whe n th e po we r- do wn sign al is m ade l o w , th e optoco uple r blo c ks and the vinsense pin is im me d i at ely re le ase d . t h e vcc c a p a ci t o r wa s c l amp e d j u st be l o w v st a r t up . this g uar an te es a sh ort st ar t- up time . fi g 29 . " ze ro w att" ap pl ic at ion with active-off signal 019aaa180 10 m 10 m 10 m 240 k 180 k 2.2 m r2 3.3 m r1 3.3 m active-off control signal ("power-down") l n c6 180 nf c11 2.2 f 50 v vinsense vcc 5 1 tea1733 zdx 18 v qx ux bd1b bd1a bd1d bd1c
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 42 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 6. layout recommendations 6.1 i n put section ? kee p the ma ins tr acks (l a n d n) lo w oh mic a n d close to ea ch o t her to a v o i d loo p s. ? position com m on m ode cho k es a w a y fro m th e po we r sectio n (m osfet an d tra n sform e r ) an d fr om e a ch othe r to p r e v e n t mag netic co uplin g to any of th e other comp on ent s. ? keep tracks from t h e bridge rec t ifier to c1 low ohmic and close to each ot her . 6.2 p ower section ? th e conn ectio n fro m th e neg ative te rmin a l of th e br idg e rectifier to the cur r e n t sen s e resis t or r 1 1 must go via c1. ? th e conn ectio n fro m th e positive te rmin a l of th e br idge rectifier to the tra n sfo r m e r mu st go via c1. ? kee p the cro s s se ctio n of th e loop fr om c1 via th e tr an sfor me r , mosfet q1 and th e cur r e n t se nse re sistor r1 1 ba ck to c1 a s small as po ssible . ? place c2 close to c1 . ? place pea k cla m p cir c uit r9, r10, c3 a n d d1 close to th e tra n sfor mer an d a w a y fr om tea1733. ? if mosfet q1 h a s a m e t a l t a b it mu st be in su lated fro m th e he at sin k . the h eat sink m u s t b e co nn ec te d to th e pr im ar y p o w e r g r o u n d . 6.3 a uxiliary winding ? place rectifier d3, r18 and vcc cap a c ito r c 1 1 close to the aux iliary w i nding. ? the connection of th e ground of the aux ilia ry w i nding to the c e ntral signal ground p o int must g o via c1 1 ( u se a sep a r a te tr ack to a v o i d th e no ise in th is gr ou nd cau s in g noise in vinsens e pin, protect pin, etc.). ? con nect th e centr a l signa l gr oun d with a low oh mic tr ack to th e centr a l po we r g r o und (c 1) . ? keep the cros s section of the loop from the auxiliary w i ndin g (via d3 and r18) to vcc cap a citor c1 1 and back to the auxilia ry winding as small as pos s ible. 6.4 flyback controller ? place the t e a1 733 away fr om the tra n sfo r m e r a nd the mosfet q1 . ? kee p conn ecti on fro m cu rr ent se nse r e sist or r1 1 to tea17 33 close to gr oun d tra c k. ? place vcc d e coup ling cap a citor c7 close to the vcc p i n. ? th e conn ectio n fro m th e vcc pin to the vcc cap a citor , c1 1, m u st go via the vcc decoupling cap a citor , c7. ? th e conn ectio n fro m th e gnd pi n to the ce ntra l sign al gr ou nd mu st go via the vcc decoupling cap a citor , c7. ? place r13 close to the isense pin.
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 43 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller ? place c10 close to the protect pin . ? place c9 close to th e ctrl pin. ? place c6 close to th e vinsense pin . ? place c8 close to th e optimer pin. 6.5 m ains isolat ion ? kee p at least 6 mm dist an ce b e tween the co ppe r tra c ks o f the p r ima r y an d th e secondary side. ? place the y - cap cy1 close to th e tr an sfor me r . 6.6 s eco ndary side ? he at s i nk se co nd a r y dio d e d 9 an d d1 0: con nect the met a l t a b (which is usua lly in tern ally con nected to the ca th od e) dir e ctly to th e he a t sin k . co n n e c t th e he at s i nk to the po sitive ou tp ut tr ack. ? kee p the cro s s se ctio n of th e loop fr om the tra n sfo r m e r via dio d e s d9 an d d1 0 an d ca p a cito rs c1 3 an d c1 4 ba ck to th e tr an sf or me r as sm a ll a s p o s s ib le. ke ep o u t p u t tr ac ks c l os e to ea ch o th e r . ? use a se p ara te sig nal g r ou nd for r2 4 and shunt re gula t or u3. co nn ect the sign al g r ou nd fro m r24 an d u3 via c19 to the p o wer gro u n d at c1 3 and c1 4. ? pla c e c1 9 clo s e to r2 0 an d r2 3. ? th e co nn ectio n of r20 a n d r23 to the po siti ve ou tp ut volt a g e mu st go via c1 9 to c1 3 a nd c14. ? pla ce th e sh un t r e gu lat o r u3 a n d s u r r o u n d i ng c o m p on en t s aw ay fr om t r a n s for m e r .
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 44 of 46 nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller 7. legal information 7.1 definitions dr a f t ? the do c u m e nt is a draf t versi on onl y . the cont ent is st ill unde r int e rn al review and subje c t to f o rmal ap proval, which m a y re su lt in modif i cat i ons or add itio ns. nxp se miconduct o rs does not g i ve a n y rep resent a t io ns o r wa rrant ies as t o t he accu racy or compl e te ness o f inf o rma tio n in c l u ded her ein and shall hav e no liab ilit y fo r t he consequ ences o f use of such inf o rmat i on . 7.2 disclaimers li mi te d wa rr a n ty an d li a b il it y ? i nf ormat i on in th is documen t is bel ieved to be accurat e and re liabl e. however , nxp s emicondu ct ors doe s not give any rep resent a t io ns o r wa rrant ies, e x p ressed or implie d, as to t he accuracy or completen e ss of such informa tio n a nd shall have no lia bility for the consequ ences o f use of such inf o rmat i on . nxp se mico nduct ors t akes no respo n sibilit y f o r t he c o nt ent in t h is documen t if pr ovided by an inf o rmat i on source out si de of nxp s emicondu ct ors. in n o e v e nt shall nxp s emicond uctor s be lia ble fo r a ny in dire ct , in cid ent a l , pun itive, spe c i a l or consequ ent ial damag es (inclu ding - wit hou t limit a t io n - lost prof it s , lost savings, business int e rrupt ion, cost s related t o the remov a l or rep l acement of an y pro duct s o r rework ch arge s) whe t he r or not such dama ges a r e based on t ort ( i ncludi ng negli gence) , warra nty , bre ach of cont ract or an y ot her le gal th eory . not with s t andin g a n y d a mages th at cust omer might incur fo r any r eason what soe v e r , nxp semi co nduct ors? ag greg at e and cumulat i ve l i abil i ty t oward s custome r for t he pro duct s d escr i bed he rein shall be li mite d i n a c cor dance wit h t he t e rms a nd condit i on s of comme rcial sale of nxp s e micondu ct or s. ri ght to m ake c h a n ge s ? nx p semicon ducto rs re s e rves t he rig ht t o ma k e chang es t o inf o rmat i on pu blished in t his documen t, i ncludin g wit ho ut limit a t io n sp ecificat ion s an d p r odu ct descript i ons, a t any time a nd with out not ice. this documen t super sed e s a nd repla c e s all inf o rma tio n sup p lied pr ior to t he pu blicat ion her eof . s u it a b il it y f o r us e ? nx p semicon ducto rs pr oduct s are no t design ed, aut hor ized or warran t e d t o be suit a b le fo r use i n l i fe supp ort , lif e-crit ical or safe ty-crit i cal syst ems o r e quip ment , nor in ap plicat ions where f a ilu re or malf unct i on of a n nx p semicond ucto rs pr oduct can re asonab ly be expe ct ed to r e sult in pe rsonal inj u ry , deat h or severe pro pert y o r e n vironme n t a l damag e. nxp s e micondu c t ors and it s suppl iers a c cep t no lia bilit y f o r inclusion an d/ or use o f nxp se mico nduct o rs prod uct s in such equ ipment or appl ica t io ns and t her efo r e such inclu s io n and /or use is at t he cu st omer ? s own risk. ap plic ation s ? a ppli c a t io ns t hat a r e describe d h erei n f or an y of t hese prod uct s ar e for il lustra tive pu rpos es only . nxp se mico nduct o rs makes no repr esent a t io n o r wa rran t y tha t such a pplication s will be suit a b le for the sp ecifi ed use w i tho ut f urt her t esti ng or modif i cat i on. custome rs ar e responsib le for t he desig n a nd ope rat i on of t hei r a pplicat ion s and pr oduct s using nxp s emicondu ct or s pro duct s , an d nxp semi co nduct ors acce pt s no liabi lity fo r any a s sist a n ce wit h app licati ons o r cu st omer pr oduct design . it is cust omer ? s sol e r e sponsib ilit y t o d e t e rmine whe t he r t h e nxp semicon ducto rs p r odu ct is sui t able a nd f i t f or t he custome r ? s a pplicat ion s an d prod uct s pl anne d, as well as f o r t he plan ned app licati on and use of cu st ome r ? s t h ird p a rt y cust omer( s ) . custo mers sho u ld pro v id e appro p ria t e design an d o pera t in g saf eg uard s t o min i mize the r i sks asso cia t e d wit h t heir appl ica t io ns a nd prod uct s . nxp semicon duct o rs d oes n o t accept any liabil i ty rela ted t o any def ault , damag e, cost s o r probl em wh ich is based on a n y weakne ss or def aul t in th e cu st ome r ? s ap plicat ions or prod uct s , or t he appl ica t io n o r use b y custo m er ? s th ird p a rt y custo mer(s). c u st omer is respo n sible f o r doing a ll n e cessa ry te st ing f o r th e cu st omer ? s app lic at ions and pro duct s u s i ng nxp semicon ducto rs p r oduct s in orde r to av oid a de fau l t of the ap plicat ions and th e p r odu ct s or of t he ap plicat ion or use by cu st omer ? s t hird p art y cu st ome r(s). nxp d oes n ot accept a n y lia b ilit y in t h is r e sp ec t. export c o nt r ol ? thi s docume n t as well as t h e it em(s) describ ed here i n may b e sub j ect t o e x p ort con t ro l r egul atio ns. expo rt migh t requ ire a prio r aut hori z a t io n f r o m compe t en t aut hor iti es. t r ansl ati o ns ? a no n-en glish (t ranslat e d ) ver s io n of a docume n t is for ref e ren c e o n ly . t h e e ngli s h version sha ll p revail in case of an y discrep an cy bet ween t he tr anslat ed and e nglish versions. 7.3 t r ademarks noti ce : all r efe renced b r ands, prod uc t name s , service names and t rad emarks are t he prop ert y of the i r respect i ve o w ners. greenchip ? is a trademark of nxp b.v.
a n 1086 8 a l l info r m atio n pr ov ide d in thi s d o cu ment is su bje c t t o le gal dis c l a i m er s. ? nx p b . v . 201 3 . al l r i ght s r e se r v ed. application note rev. 3.1 ? 22 may 2013 45 of 46 continued >> nxp semiconductors AN10868 gree nchip tea1 73 3 ser ie s fixe d fre que ncy f l y bac k con t ro ller 8. content s 1 i n trod uctio n . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4 t ea1733 se ri es type o v e r vi ew . . . . . . . . . . . . . 4 1.5 la tch ed version s t e a1 733 l t , t e a1 733 mt , t ea1733 l t /n2 an d tea17 33mt/n2 . . . . . . . . 4 1.6 hi gher switchin g frequ ency versions tea1 733a t , t ea1733 mt (/n2) a nd t e a1 733bt . . . . . . . . . 4 1.7 application schematic . . . . . . . . . . . . . . . . . . . . 4 2 pi n d e scrip t io n . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 f u n c ti on al d e scri p ti on . . . . . . . . . . . . . . . . . . 10 3.1 gener a l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 s t art - up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2.1 ch argin g the vcc cap a citor . . . . . . . . . . . . . . 10 3.2.2 meas uring st art -up time . . . . . . . . . . . . . . . . . 13 3. 2. 3 s t a r t-up ci rcu i t wi th di ode s . . . . . . . . . . . . . . . 1 3 3.2.4 s t art -up cir cuit wit h char ge pump . . . . . . . . . . 14 3.2.4.1 ch arge pu mp i n co mb inat io n with pfc . . . . . 1 6 3.2.5 vcc cap a citor. . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2.6 s t art - up conditions . . . . . . . . . . . . . . . . . . . . . 17 3.2.7 sof t st art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.2.8 safe rest art . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2.9 clamp s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 inpu t volt ag e se nsing (vinsense p i n) . . . . . 1 9 3.3.1 gener a l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3.2 s t art - up volt age . . . . . . . . . . . . . . . . . . . . . . . . 20 3.3.3 inpu t overvo lt a ge protection . . . . . . . . . . . . . . 2 0 3.3.4 brownout protect i on . . . . . . . . . . . . . . . . . . . . 21 3.3.5 overpower com p ensation . . . . . . . . . . . . . . . . 21 3.3.6 filter cap a citor . . . . . . . . . . . . . . . . . . . . . . . . 21 3.3.7 clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4 protection features . . . . . . . . . . . . . . . . . . . . . 21 3.4.1 gener a l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4.2 inpu t ove r v o lt a ge protec ti on (in put ovp) . . . 2 2 3.4.3 brownout protect i on . . . . . . . . . . . . . . . . . . . . 22 3.4.4 internal overt e mpe r a t u r e pro t ectio n (interna l ot p) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4.5 maximum on-time protection (t ea1733 l t /n2 and t ea1733mt / n2 only) . . . . . . . . . . . . . . . 22 3.4.6 overpower protection (o pp) . . . . . . . . . . . . . 22 3.4.7 output overv o lt age pr otection (output ovp) 2 3 3.4.8 external overt e mperat u r e protection (external ot p) . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4.9 lat c hed protection . . . . . . . . . . . . . . . . . . . . . 23 3.4.10 re settin g a l a tched prot ectio n . . . . . . . . . . . . 2 3 3.4.1 1 underv o lt age locko ut (uvlo) . . . . . . . . . . . 23 3. 5 overpower protection (op p ) . . . . . . . . . . . . . 24 3 . 5 . 1 co ntinu ous and tempora r y ou tp ut po wer limit a t i on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3. 5. 2 how t h e opp operates . . . . . . . . . . . . . . . . . 24 3. 5. 3 peak cur r ent lim i t a t i on (o cp) . . . . . . . . . . . . 24 3 . 5 . 4 inp u t vol t ag e compensa t i o n . . . . . . . . . . . . . . 24 3 . 5 . 5 ho w to con f i gure the current se nse resistor . 25 3 . 5 . 6 ca lcula t i ng the maximum tempo r ary o u tput power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3 . 5 . 7 ho w to con f i gure the opp compen sati on (r s t a r t( so f t ) ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3. 5. 8 h o w t o d i sa b l e th e opp co mp en sa ti o n (for dcm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3. 5. 9 opp delay and r e st art delay . . . . . . . . . . . . . 30 3 . 5 . 10 di sabli ng the overpo wer protection . . . . . . . . 30 3 . 5 . 1 1 l eadi ng ed ge bla n king . . . . . . . . . . . . . . . . . . 30 3. 6 ctrl pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3. 6. 1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3. 6. 2 input biasing . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3. 6. 3 peak cur r ent control . . . . . . . . . . . . . . . . . . . . 31 3 . 6 . 4 f r equ ency reduction a t low o u tput p o wer . . . 32 3 . 6 . 5 sl ope compe n sation . . . . . . . . . . . . . . . . . . . 32 3. 7 opt imer pin . . . . . . . . . . . . . . . . . . . . . . . . . 33 3. 7. 1 overpower delay and rest ar t delay . . . . . . . . 33 3. 7. 2 overpower delay . . . . . . . . . . . . . . . . . . . . . . 34 3. 7. 3 rest ar t delay . . . . . . . . . . . . . . . . . . . . . . . . . 34 3. 7. 4 how t o conf igure r and c . . . . . . . . . . . . . . . 34 3. 8 prot ect pin . . . . . . . . . . . . . . . . . . . . . . . . 35 3. 8. 1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 3. 8. 2 circuit description . . . . . . . . . . . . . . . . . . . . . 35 3 . 8 . 3 output overvolt ag e protecti on . . . . . . . . . . . . 36 3. 8. 4 overtemperature prot ec tion . . . . . . . . . . . . . . 36 3. 8. 5 clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3. 9 dri ver pin . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3. 9. 1 gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3. 9. 2 frequency m o dulat ion . . . . . . . . . . . . . . . . . . 36 4 w ays to reduce no -lo a d p o w e r . . . . . . . . . . . 37 4. 1 remove power led . . . . . . . . . . . . . . . . . . . . 37 4 . 2 ch ang e the p rimary rd c cl amp to a zener clam p . . . . . . . . . . . . . . . . . . . . . . . . 37 4. 3 mo di fy r d c cl am p wi t h a ze n e r d i o d e . . . . . 3 7 4 . 4 re consid er st art-up time sp ecification . . . . . . 38 4. 5 reduce vcc cap a citor value . . . . . . . . . . . . . 38 4. 6 x-cap qualit y . . . . . . . . . . . . . . . . . . . . . . . . . 38 4. 7 x-cap value . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4. 8 active x-cap discharge . . . . . . . . . . . . . . . . . 38 4. 9 active st ar t-up circuit . . . . . . . . . . . . . . . . . . . 38
nxp semiconductors AN10868 greenchip tea1733 series fixed frequency flyback controller ? nxp b . v . 20 13. al l r i g h t s re se rv ed. for m o r e i n for m a t i o n , plea se visit: htt p :// w ww.n x p.co m for sale s of fice a d d r e sses, plea se se nd an ema i l t o : s a lesa ddre sses@ nxp . com date of release: 22 may 2013 document identifier: AN10868 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 4.10 increasi ng th e imped ance of the vo lt a ge divider on vinsense . . . . . . . . . . . . . . . . . . . 38 4.1 1 increase the impe dan ce o f the outpu t volt age divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.12 re placi ng th e integra t e d sh unt re gula t o r (t l431 ) b y a di screte shu n t reg u lator . . . . . . . 3 9 5 "zer o w a tt" st and b y p o wer d esign id eas . . . 3 9 5.1 le ss than 3 0 mw st and by p o we r . . . . . . . . . . 3 9 5.2 active on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 5.2.1 shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.2.2 w a ke-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.3 active of f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.3.1 shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 5.3.2 w a ke-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6 l a yo ut recommendati on s . . . . . . . . . . . . . . . . 42 6.1 input section . . . . . . . . . . . . . . . . . . . . . . . . . . 42 6.2 power section . . . . . . . . . . . . . . . . . . . . . . . . . 42 6.3 auxiliary winding . . . . . . . . . . . . . . . . . . . . . . . 42 6.4 flyback controller . . . . . . . . . . . . . . . . . . . . . . 42 6.5 mains is olation . . . . . . . . . . . . . . . . . . . . . . . . 43 6.6 seco ndary side . . . . . . . . . . . . . . . . . . . . . . . . 4 3 7 l e g a l i n fo rmatio n . . . . . . . . . . . . . . . . . . . . . . . 44 7.1 def i nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 7.2 dis c laimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 7.3 t r ademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 8 co ntent s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

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